xml/p10/node_gfir_spa.xml

<?xml version="1.0" encoding="UTF-8"?>
<attn_node model_ec="P10_10,P10_20" name="GFIR_SPA" reg_type="SCOM">
    <register name="GFIR_REG_SPA">
        <instance addr="0x570F001A" reg_inst="0"/>
    </register>
    <rule attn_type="SPA" node_inst="0">
        <expr type="reg" value1="GFIR_REG_SPA"/>
    </rule>
    <bit child_node="CFIR_TP_SPA_UCS_HA" node_inst="0" pos="1">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_N0_SPA" node_inst="0" pos="2">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_N1_SPA" node_inst="0" pos="3">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_PCI_SPA_HA" node_inst="0" pos="8">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_PCI_SPA_HA" node_inst="1" pos="9">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_MC_CS_RE_SPA" node_inst="0" pos="12">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_MC_CS_RE_SPA" node_inst="1" pos="13">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_MC_CS_RE_SPA" node_inst="2" pos="14">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_MC_CS_RE_SPA" node_inst="3" pos="15">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_PAUE_SPA" node_inst="0" pos="16">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_PAUE_SPA" node_inst="1" pos="17">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_PAUW_SPA" node_inst="0" pos="18">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_PAUW_SPA" node_inst="1" pos="19">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_IOHS_CS_RE_SPA" node_inst="0" pos="24">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_IOHS_CS_RE_SPA" node_inst="1" pos="25">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_IOHS_CS_RE_SPA" node_inst="2" pos="26">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_IOHS_CS_RE_SPA" node_inst="3" pos="27">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_IOHS_CS_RE_SPA" node_inst="4" pos="28">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_IOHS_CS_RE_SPA" node_inst="5" pos="29">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_IOHS_CS_RE_SPA" node_inst="6" pos="30">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_IOHS_CS_RE_SPA" node_inst="7" pos="31">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_EQ_SPA" node_inst="0" pos="32">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_EQ_SPA" node_inst="1" pos="33">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_EQ_SPA" node_inst="2" pos="34">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_EQ_SPA" node_inst="3" pos="35">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_EQ_SPA" node_inst="4" pos="36">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_EQ_SPA" node_inst="5" pos="37">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_EQ_SPA" node_inst="6" pos="38">XSTOP Register - after masking - OLD XFIR</bit>
    <bit child_node="CFIR_EQ_SPA" node_inst="7" pos="39">XSTOP Register - after masking - OLD XFIR</bit>
</attn_node>