blob: d95ac0c916ed9961f09374f74cd1157e94b73bc7 [file] [log] [blame]
Zane Shelleyabc51c22020-11-09 21:35:35 -06001<?xml version="1.0" encoding="UTF-8"?>
Zane Shelleyf8a726b2020-12-16 21:29:32 -06002<attn_node model_ec="P10_10,P10_20" name="EQ_CORE_THREAD_STATE" reg_type="SCOM">
Zane Shelleyabc51c22020-11-09 21:35:35 -06003 <register name="CORE_THREAD_STATE">
4 <instance addr="0x20028412" reg_inst="0"/>
5 <instance addr="0x20024412" reg_inst="1"/>
6 <instance addr="0x20022412" reg_inst="2"/>
7 <instance addr="0x20021412" reg_inst="3"/>
8 <instance addr="0x21028412" reg_inst="4"/>
9 <instance addr="0x21024412" reg_inst="5"/>
10 <instance addr="0x21022412" reg_inst="6"/>
11 <instance addr="0x21021412" reg_inst="7"/>
12 <instance addr="0x22028412" reg_inst="8"/>
13 <instance addr="0x22024412" reg_inst="9"/>
14 <instance addr="0x22022412" reg_inst="10"/>
15 <instance addr="0x22021412" reg_inst="11"/>
16 <instance addr="0x23028412" reg_inst="12"/>
17 <instance addr="0x23024412" reg_inst="13"/>
18 <instance addr="0x23022412" reg_inst="14"/>
19 <instance addr="0x23021412" reg_inst="15"/>
20 <instance addr="0x24028412" reg_inst="16"/>
21 <instance addr="0x24024412" reg_inst="17"/>
22 <instance addr="0x24022412" reg_inst="18"/>
23 <instance addr="0x24021412" reg_inst="19"/>
24 <instance addr="0x25028412" reg_inst="20"/>
25 <instance addr="0x25024412" reg_inst="21"/>
26 <instance addr="0x25022412" reg_inst="22"/>
27 <instance addr="0x25021412" reg_inst="23"/>
28 <instance addr="0x26028412" reg_inst="24"/>
29 <instance addr="0x26024412" reg_inst="25"/>
30 <instance addr="0x26022412" reg_inst="26"/>
31 <instance addr="0x26021412" reg_inst="27"/>
32 <instance addr="0x27028412" reg_inst="28"/>
33 <instance addr="0x27024412" reg_inst="29"/>
34 <instance addr="0x27022412" reg_inst="30"/>
35 <instance addr="0x27021412" reg_inst="31"/>
36 </register>
37 <!-- Each EQ_SPATTN will only report 4 of the possible 8 threads back to the
38 CFIR_EQ_SPA. The reported threads are dependent on the core mode. In
39 Normal Core Mode (CORE_THREAD_STATE[63]=0), only threads 0-3 report to
40 the CFIR_EQ_SPA. In Fused Core Mode (CORE_THREAD_STATE[63]=1), both
41 EQ_SPATTN in the fused core pair display the exact same information for
42 all eight threads in the pair. However, only the even threads on the
43 even cores and the odd threads on the odd cores report to the
44 CFIR_EQ_SPA. -->
45 <rule attn_type="SPA" node_inst="0:31">
46 <!-- (~CORE_THREAD_STATE[63] << 63) | (CORE_THREAD_STATE[63] << 62) -->
47 <expr type="or">
48 <expr type="lshift" value1="63">
49 <expr type="and">
50 <expr type="not">
51 <expr type="reg" value1="CORE_THREAD_STATE"/>
52 </expr>
53 <expr type="int" value1="0x0000000000000001"/>
54 </expr>
55 </expr>
56 <expr type="lshift" value1="62">
57 <expr type="and">
58 <expr type="reg" value1="CORE_THREAD_STATE"/>
59 <expr type="int" value1="0x0000000000000001"/>
60 </expr>
61 </expr>
62 </expr>
63 </rule>
64 <bit child_node="EQ_SPATTN_NORMAL" node_inst="0:31" pos="0">EQ_SPATTN normal core mode</bit>
65 <bit child_node="EQ_SPATTN_FUSED" node_inst="0:31" pos="1">EQ_SPATTN fused core mode</bit>
66</attn_node>