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gerrit.openbmc.org / openbmc / openpower-libhei / 352293d0838d97ca2f72cef07e8af271ae1fc9cb / . / chip_data / p10_10 / node_eq_l3_fir.json
blob: 35ca70e5a11e76856ed569621940f3e4fefc6a77 [file] [log] [blame]
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600[diff] [blame]1{
2 "version": 1,
3 "model_ec": ["P10_10"],
4 "registers": {
5 "EQ_L3_FIR": {
6 "instances": {
7 "0": "0x20018600",
8 "1": "0x20014600",
9 "2": "0x20012600",
10 "3": "0x20011600",
11 "4": "0x21018600",
12 "5": "0x21014600",
13 "6": "0x21012600",
14 "7": "0x21011600",
15 "8": "0x22018600",
16 "9": "0x22014600",
17 "10": "0x22012600",
18 "11": "0x22011600",
19 "12": "0x23018600",
20 "13": "0x23014600",
21 "14": "0x23012600",
22 "15": "0x23011600",
23 "16": "0x24018600",
24 "17": "0x24014600",
25 "18": "0x24012600",
26 "19": "0x24011600",
27 "20": "0x25018600",
28 "21": "0x25014600",
29 "22": "0x25012600",
30 "23": "0x25011600",
31 "24": "0x26018600",
32 "25": "0x26014600",
33 "26": "0x26012600",
34 "27": "0x26011600",
35 "28": "0x27018600",
36 "29": "0x27014600",
37 "30": "0x27012600",
38 "31": "0x27011600"
39 }
40 },
41 "EQ_L3_FIR_MASK": {
42 "instances": {
43 "0": "0x20018603",
44 "1": "0x20014603",
45 "2": "0x20012603",
46 "3": "0x20011603",
47 "4": "0x21018603",
48 "5": "0x21014603",
49 "6": "0x21012603",
50 "7": "0x21011603",
51 "8": "0x22018603",
52 "9": "0x22014603",
53 "10": "0x22012603",
54 "11": "0x22011603",
55 "12": "0x23018603",
56 "13": "0x23014603",
57 "14": "0x23012603",
58 "15": "0x23011603",
59 "16": "0x24018603",
60 "17": "0x24014603",
61 "18": "0x24012603",
62 "19": "0x24011603",
63 "20": "0x25018603",
64 "21": "0x25014603",
65 "22": "0x25012603",
66 "23": "0x25011603",
67 "24": "0x26018603",
68 "25": "0x26014603",
69 "26": "0x26012603",
70 "27": "0x26011603",
71 "28": "0x27018603",
72 "29": "0x27014603",
73 "30": "0x27012603",
74 "31": "0x27011603"
75 }
76 },
77 "EQ_L3_FIR_ACT0": {
78 "instances": {
79 "0": "0x20018606",
80 "1": "0x20014606",
81 "2": "0x20012606",
82 "3": "0x20011606",
83 "4": "0x21018606",
84 "5": "0x21014606",
85 "6": "0x21012606",
86 "7": "0x21011606",
87 "8": "0x22018606",
88 "9": "0x22014606",
89 "10": "0x22012606",
90 "11": "0x22011606",
91 "12": "0x23018606",
92 "13": "0x23014606",
93 "14": "0x23012606",
94 "15": "0x23011606",
95 "16": "0x24018606",
96 "17": "0x24014606",
97 "18": "0x24012606",
98 "19": "0x24011606",
99 "20": "0x25018606",
100 "21": "0x25014606",
101 "22": "0x25012606",
102 "23": "0x25011606",
103 "24": "0x26018606",
104 "25": "0x26014606",
105 "26": "0x26012606",
106 "27": "0x26011606",
107 "28": "0x27018606",
108 "29": "0x27014606",
109 "30": "0x27012606",
110 "31": "0x27011606"
111 }
112 },
113 "EQ_L3_FIR_ACT1": {
114 "instances": {
115 "0": "0x20018607",
116 "1": "0x20014607",
117 "2": "0x20012607",
118 "3": "0x20011607",
119 "4": "0x21018607",
120 "5": "0x21014607",
121 "6": "0x21012607",
122 "7": "0x21011607",
123 "8": "0x22018607",
124 "9": "0x22014607",
125 "10": "0x22012607",
126 "11": "0x22011607",
127 "12": "0x23018607",
128 "13": "0x23014607",
129 "14": "0x23012607",
130 "15": "0x23011607",
131 "16": "0x24018607",
132 "17": "0x24014607",
133 "18": "0x24012607",
134 "19": "0x24011607",
135 "20": "0x25018607",
136 "21": "0x25014607",
137 "22": "0x25012607",
138 "23": "0x25011607",
139 "24": "0x26018607",
140 "25": "0x26014607",
141 "26": "0x26012607",
142 "27": "0x26011607",
143 "28": "0x27018607",
144 "29": "0x27014607",
145 "30": "0x27012607",
146 "31": "0x27011607"
147 }
148 }
149 },
150 "isolation_nodes": {
151 "EQ_L3_FIR": {
152 "instances": [
153 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
154 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
155 ],
156 "rules": [
157 {
158 "attn_type": ["CS"],
159 "node_inst": [
160 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
161 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
162 30, 31
163 ],
164 "expr": {
165 "expr_type": "and",
166 "exprs": [
167 {
168 "expr_type": "reg",
169 "reg_name": "EQ_L3_FIR"
170 },
171 {
172 "expr_type": "not",
173 "expr": {
174 "expr_type": "reg",
175 "reg_name": "EQ_L3_FIR_MASK"
176 }
177 },
178 {
179 "expr_type": "not",
180 "expr": {
181 "expr_type": "reg",
182 "reg_name": "EQ_L3_FIR_ACT0"
183 }
184 },
185 {
186 "expr_type": "not",
187 "expr": {
188 "expr_type": "reg",
189 "reg_name": "EQ_L3_FIR_ACT1"
190 }
191 }
192 ]
193 }
194 },
195 {
196 "attn_type": ["RE"],
197 "node_inst": [
198 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
199 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
200 30, 31
201 ],
202 "expr": {
203 "expr_type": "and",
204 "exprs": [
205 {
206 "expr_type": "reg",
207 "reg_name": "EQ_L3_FIR"
208 },
209 {
210 "expr_type": "not",
211 "expr": {
212 "expr_type": "reg",
213 "reg_name": "EQ_L3_FIR_MASK"
214 }
215 },
216 {
217 "expr_type": "not",
218 "expr": {
219 "expr_type": "reg",
220 "reg_name": "EQ_L3_FIR_ACT0"
221 }
222 },
223 {
224 "expr_type": "reg",
225 "reg_name": "EQ_L3_FIR_ACT1"
226 }
227 ]
228 }
229 }
230 ],
231 "bits": {
232 "0": {
233 "desc": "No members available for a CGC"
234 },
235 "1": {
236 "desc": "L3 attempted to master a CP (Castout/Push) command"
237 },
238 "2": {
239 "desc": "Access attempted to use invalid topology table entry"
240 },
241 "3": {
242 "desc": "L3 cache CE and UE within a short period"
243 },
244 "4": {
245 "desc": "CE detected on L3 cache read"
246 },
247 "5": {
248 "desc": "UE detected on L3 cache read"
249 },
250 "6": {
251 "desc": "SUE detected on L3 cache read"
252 },
253 "7": {
254 "desc": "L3 cache write data CE from Power Bus"
255 },
256 "8": {
257 "desc": "L3 cache write data UE from Power Bus"
258 },
259 "9": {
260 "desc": "L3 cache write data sue from Power Bus"
261 },
262 "10": {
263 "desc": "L3 cache write data CE from L2"
264 },
265 "11": {
266 "desc": "L3 cache write data UE from L2"
267 },
268 "12": {
269 "desc": "L3 cache write SUE from L2"
270 },
271 "13": {
272 "desc": "L3 DIR read CE"
273 },
274 "14": {
275 "desc": "L3 Dir read UE"
276 },
277 "15": {
278 "desc": "Dir error not found during corr seq"
279 },
280 "16": {
281 "desc": "Received addr_error cresp on Snoop Machine or Castout Operation"
282 },
283 "17": {
284 "desc": "Received addr_error cresp for Prefetch Operation"
285 },
286 "18": {
287 "desc": "L3_PB_HANG_POLL"
288 },
289 "19": {
290 "desc": "Invalid LRU count error"
291 },
292 "20": {
293 "desc": "Reserved"
294 },
295 "21": {
296 "desc": "Reserved"
297 },
298 "22": {
299 "desc": "Reserved"
300 },
301 "23": {
302 "desc": "Prefetch or Write Inject machine PowerBus data hang check"
303 },
304 "24": {
305 "desc": "L3 Hw control err"
306 },
307 "25": {
308 "desc": "Cache inhibited op in L3 directory"
309 },
310 "26": {
311 "desc": "L3 line delete CE done"
312 },
313 "27": {
314 "desc": "L3 snooped an incoming LCO"
315 },
316 "28": {
317 "desc": "LRU intended to victimize a line, but invalid line selected"
318 },
319 "29": {
320 "desc": "L3 cache congruence class deleted"
321 },
322 "30": {
323 "desc": "Incoming LCO ID mismatch"
324 },
325 "31": {
326 "desc": "L3 PowerBus Master Write CRESP ack_dead"
327 },
328 "32": {
329 "desc": "PB Master Read received ack_dead CRESP"
330 }
331 },
332 "capture_groups": [
333 {
334 "group_name": "EQ_L3_FIR",
335 "group_inst": {
336 "0": 0,
337 "1": 1,
338 "2": 2,
339 "3": 3,
340 "4": 4,
341 "5": 5,
342 "6": 6,
343 "7": 7,
344 "8": 8,
345 "9": 9,
346 "10": 10,
347 "11": 11,
348 "12": 12,
349 "13": 13,
350 "14": 14,
351 "15": 15,
352 "16": 16,
353 "17": 17,
354 "18": 18,
355 "19": 19,
356 "20": 20,
357 "21": 21,
358 "22": 22,
359 "23": 23,
360 "24": 24,
361 "25": 25,
362 "26": 26,
363 "27": 27,
364 "28": 28,
365 "29": 29,
366 "30": 30,
367 "31": 31
368 }
369 }
370 ]
371 }
372 }
373}