Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 1 | // Module Description ************************************************** |
| 2 | // |
| 3 | // Description: This module provides the implementation for the PRD Scan |
| 4 | // Comm Register Chip class. |
| 5 | // |
| 6 | // End Module Description ********************************************** |
| 7 | |
| 8 | //---------------------------------------------------------------------- |
| 9 | // Includes |
| 10 | //---------------------------------------------------------------------- |
| 11 | |
Zane Shelley | 52cb1a9 | 2019-08-21 14:38:31 -0500 | [diff] [blame^] | 12 | #include <hei_includes.hpp> |
| 13 | #include <register/hei_hardware_register.hpp> |
| 14 | #include <util/hei_bit_string.hpp> |
| 15 | |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 16 | #include <iipchip.h> |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 17 | #include <prdfMain.H> |
| 18 | #include <prdfRasServices.H> |
| 19 | #include <prdfRegisterCache.H> |
| 20 | #include <prdfHomRegisterAccess.H> |
| 21 | #include <prdfPlatServices.H> |
| 22 | #include <prdfExtensibleChip.H> |
| 23 | |
| 24 | //---------------------------------------------------------------------- |
| 25 | // User Types |
| 26 | //---------------------------------------------------------------------- |
| 27 | |
| 28 | //---------------------------------------------------------------------- |
| 29 | // Constants |
| 30 | //---------------------------------------------------------------------- |
| 31 | |
| 32 | //---------------------------------------------------------------------- |
| 33 | // Macros |
| 34 | //---------------------------------------------------------------------- |
| 35 | |
| 36 | //---------------------------------------------------------------------- |
| 37 | // Internal Function Prototypes |
| 38 | //---------------------------------------------------------------------- |
| 39 | |
| 40 | //---------------------------------------------------------------------- |
| 41 | // Global Variables |
| 42 | //---------------------------------------------------------------------- |
| 43 | |
| 44 | //--------------------------------------------------------------------- |
| 45 | // Member Function Specifications |
| 46 | //--------------------------------------------------------------------- |
| 47 | |
| 48 | // -------------------------------------------------------------------- |
Zane Shelley | 871adec | 2019-07-30 11:01:39 -0500 | [diff] [blame] | 49 | namespace libhei |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 50 | { |
| 51 | |
| 52 | // --------------------------------------------------------------------- |
| 53 | |
| 54 | void ScomRegister::SetBitString( const BitString *bs ) |
| 55 | { |
| 56 | BitString & l_string = AccessBitString(); |
| 57 | l_string.setString(*bs); |
| 58 | } |
| 59 | |
| 60 | |
| 61 | //------------------------------------------------------------------------------ |
| 62 | |
| 63 | const BitString * ScomRegister::GetBitString(ATTENTION_TYPE i_type) const |
| 64 | { |
| 65 | // Calling Read() will ensure that an entry exists in the cache and the |
| 66 | // entry has at been synched with hardware at least once. Note that we |
| 67 | // cannot read hardware for write-only registers. In this case, an entry |
| 68 | // will be created in the cache, if it does not exist, when readCache() is |
| 69 | // called below. |
| 70 | if ( ( ACCESS_NONE != iv_operationType ) && |
| 71 | ( ACCESS_WO != iv_operationType ) ) |
| 72 | { |
| 73 | Read(); |
| 74 | } |
| 75 | return &(readCache()); |
| 76 | } |
| 77 | |
| 78 | //------------------------------------------------------------------------------ |
| 79 | |
| 80 | BitString & ScomRegister::AccessBitString() |
| 81 | { |
| 82 | // Calling Read() will ensure that an entry exists in the cache and the |
| 83 | // entry has at been synched with hardware at least once. Note that we |
| 84 | // cannot read hardware for write-only registers. In this case, an entry |
| 85 | // will be created in the cache, if it does not exist, when readCache() is |
| 86 | // called below. |
| 87 | if ( ( ACCESS_NONE != iv_operationType ) && |
| 88 | ( ACCESS_WO != iv_operationType ) ) |
| 89 | { |
| 90 | Read(); |
| 91 | } |
| 92 | |
| 93 | return readCache(); |
| 94 | } |
| 95 | |
| 96 | //------------------------------------------------------------------------------ |
| 97 | |
| 98 | uint32_t ScomRegister::Read() const |
| 99 | { |
| 100 | uint32_t o_rc = SUCCESS; |
| 101 | |
| 102 | // First query the cache for an existing entry. |
| 103 | if ( !queryCache() ) |
| 104 | { |
| 105 | // There was not a previous entry in the cache, so do a ForceRead() to |
| 106 | // sync the cache with hardware. |
| 107 | o_rc = ForceRead(); |
| 108 | } |
| 109 | |
| 110 | return o_rc; |
| 111 | } |
| 112 | |
| 113 | //------------------------------------------------------------------------------ |
| 114 | |
| 115 | uint32_t ScomRegister::ForceRead() const |
| 116 | { |
| 117 | #define PRDF_FUNC "[ScomRegister::ForceRead] " |
| 118 | |
| 119 | uint32_t o_rc = FAIL; |
| 120 | |
| 121 | do |
| 122 | { |
| 123 | // No read allowed if register access attribute is write-only or no |
| 124 | // access. |
| 125 | if ( ( ACCESS_NONE == iv_operationType ) && |
| 126 | ( ACCESS_WO == iv_operationType ) ) |
| 127 | { |
| 128 | PRDF_ERR( PRDF_FUNC "Write-only register: 0x%08x 0x%016llx", |
| 129 | getChip()->GetId(), iv_scomAddress ); |
| 130 | break; |
| 131 | } |
| 132 | |
| 133 | // Read hardware. |
Zane Shelley | ea1a1ac | 2019-08-08 16:27:20 -0500 | [diff] [blame] | 134 | o_rc = Access( readCache(), RegisterAccess::READ ); |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 135 | if ( SUCCESS != o_rc ) |
| 136 | { |
| 137 | // The read failed. Remove the entry from the cache so a subsequent |
| 138 | // Read() will attempt to read from hardware again. |
| 139 | flushCache( getChip() ); |
| 140 | } |
| 141 | |
| 142 | } while (0); |
| 143 | |
| 144 | return o_rc; |
| 145 | |
| 146 | #undef PRDF_FUNC |
| 147 | } |
| 148 | |
| 149 | //------------------------------------------------------------------------------ |
| 150 | |
| 151 | uint32_t ScomRegister::Write() |
| 152 | { |
| 153 | #define PRDF_FUNC "[ScomRegister::Write] " |
| 154 | |
| 155 | uint32_t o_rc = FAIL; |
| 156 | |
| 157 | do |
| 158 | { |
| 159 | // No write allowed if register access attribute is read-only or no |
| 160 | // access. |
| 161 | if ( ( ACCESS_NONE == iv_operationType ) && |
| 162 | ( ACCESS_RO == iv_operationType ) ) |
| 163 | { |
| 164 | PRDF_ERR( PRDF_FUNC "Read-only register: 0x%08x 0x%016llx", |
| 165 | getChip()->GetId(), iv_scomAddress ); |
| 166 | break; |
| 167 | } |
| 168 | |
| 169 | // Query the cache for an existing entry. |
| 170 | if ( !queryCache() ) |
| 171 | { |
| 172 | // Something bad happened and there was nothing in the cache to |
| 173 | // write to hardware. |
| 174 | PRDF_ERR( PRDF_FUNC "No entry found in cache: 0x%08x 0x%016llx", |
| 175 | getChip()->GetId(), iv_scomAddress ); |
| 176 | break; |
| 177 | } |
| 178 | |
| 179 | // Write hardware. |
Zane Shelley | ea1a1ac | 2019-08-08 16:27:20 -0500 | [diff] [blame] | 180 | o_rc = Access( readCache(), RegisterAccess::WRITE ); |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 181 | |
| 182 | } while (0); |
| 183 | |
| 184 | return o_rc; |
| 185 | |
| 186 | #undef PRDF_FUNC |
| 187 | } |
| 188 | |
| 189 | //------------------------------------------------------------------------------ |
| 190 | |
| 191 | uint32_t ScomRegister::Access( BitString & bs, |
Zane Shelley | ea1a1ac | 2019-08-08 16:27:20 -0500 | [diff] [blame] | 192 | RegisterAccess::Operation op ) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 193 | { |
| 194 | int32_t l_rc = SCR_ACCESS_FAILED; |
| 195 | TARGETING::TargetHandle_t i_pchipTarget = getChip()->GetChipHandle(); |
| 196 | l_rc = getScomService().Access( i_pchipTarget,bs,iv_scomAddress,op ); |
| 197 | |
| 198 | return(l_rc); |
| 199 | } |
| 200 | //----------------------------------------------------------------------------- |
| 201 | ExtensibleChip* ScomRegister::getChip( )const |
| 202 | { |
| 203 | ExtensibleChip* l_pchip = NULL; |
| 204 | l_pchip = ServiceDataCollector::getChipAnalyzed(); |
| 205 | TARGETING::TYPE l_type = PlatServices::getTargetType( |
| 206 | l_pchip->GetChipHandle() ); |
| 207 | PRDF_ASSERT( iv_chipType == l_type ) |
| 208 | return l_pchip; |
| 209 | } |
| 210 | |
| 211 | //------------------------------------------------------------------------------ |
| 212 | |
| 213 | bool ScomRegister::queryCache() const |
| 214 | { |
| 215 | RegDataCache & cache = RegDataCache::getCachedRegisters(); |
| 216 | BitString * bs = cache.queryCache( getChip(), this ); |
| 217 | return ( NULL != bs ); |
| 218 | } |
| 219 | |
| 220 | //------------------------------------------------------------------------------ |
| 221 | |
| 222 | BitString & ScomRegister::readCache() const |
| 223 | { |
| 224 | RegDataCache & cache = RegDataCache::getCachedRegisters(); |
| 225 | return cache.read( getChip(), this ); |
| 226 | } |
| 227 | |
| 228 | //------------------------------------------------------------------------------ |
| 229 | |
| 230 | void ScomRegister::flushCache( ExtensibleChip *i_pChip ) const |
| 231 | { |
| 232 | RegDataCache & regDump = RegDataCache::getCachedRegisters(); |
| 233 | if( NULL == i_pChip ) |
| 234 | { |
| 235 | regDump.flush(); |
| 236 | } |
| 237 | else |
| 238 | { |
| 239 | regDump.flush( i_pChip ,this ); |
| 240 | } |
| 241 | } |
| 242 | |
| 243 | //----------------------------------------------------------------------------- |
| 244 | |
| 245 | bool ScomRegister::operator == ( const ScomRegister & i_rightRegister ) const |
| 246 | { |
| 247 | if( iv_scomAddress == i_rightRegister.GetAddress() ) |
| 248 | { |
| 249 | return ( iv_chipType == i_rightRegister.getChipType() ); |
| 250 | } |
| 251 | else |
| 252 | { |
| 253 | return false ; |
| 254 | } |
| 255 | |
| 256 | } |
| 257 | |
| 258 | //----------------------------------------------------------------------------- |
| 259 | bool ScomRegister::operator < ( const ScomRegister & i_rightRegister ) const |
| 260 | { |
| 261 | if( iv_scomAddress == i_rightRegister.GetAddress() ) |
| 262 | { |
| 263 | return ( iv_chipType < i_rightRegister.getChipType() ); |
| 264 | } |
| 265 | else |
| 266 | { |
| 267 | return( iv_scomAddress < i_rightRegister.GetAddress() ); |
| 268 | } |
| 269 | |
| 270 | |
| 271 | } |
| 272 | //----------------------------------------------------------------------------- |
| 273 | bool ScomRegister::operator >= ( const ScomRegister & i_rightRegister ) const |
| 274 | { |
| 275 | return !( *this < i_rightRegister ); |
| 276 | } |
Zane Shelley | 871adec | 2019-07-30 11:01:39 -0500 | [diff] [blame] | 277 | |
| 278 | } // end namespace libhei |
| 279 | |