| Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 1 | /* IBM_PROLOG_BEGIN_TAG                                                   */ | 
|  | 2 | /* This is an automatically generated prolog.                             */ | 
|  | 3 | /*                                                                        */ | 
|  | 4 | /* $Source: src/usr/diag/prdf/common/framework/register/prdfRegisterCache.H $ */ | 
|  | 5 | /*                                                                        */ | 
|  | 6 | /* OpenPOWER HostBoot Project                                             */ | 
|  | 7 | /*                                                                        */ | 
|  | 8 | /* Contributors Listed Below - COPYRIGHT 2012,2017                        */ | 
|  | 9 | /* [+] International Business Machines Corp.                              */ | 
|  | 10 | /*                                                                        */ | 
|  | 11 | /*                                                                        */ | 
|  | 12 | /* Licensed under the Apache License, Version 2.0 (the "License");        */ | 
|  | 13 | /* you may not use this file except in compliance with the License.       */ | 
|  | 14 | /* You may obtain a copy of the License at                                */ | 
|  | 15 | /*                                                                        */ | 
|  | 16 | /*     http://www.apache.org/licenses/LICENSE-2.0                         */ | 
|  | 17 | /*                                                                        */ | 
|  | 18 | /* Unless required by applicable law or agreed to in writing, software    */ | 
|  | 19 | /* distributed under the License is distributed on an "AS IS" BASIS,      */ | 
|  | 20 | /* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */ | 
|  | 21 | /* implied. See the License for the specific language governing           */ | 
|  | 22 | /* permissions and limitations under the License.                         */ | 
|  | 23 | /*                                                                        */ | 
|  | 24 | /* IBM_PROLOG_END_TAG                                                     */ | 
|  | 25 |  | 
|  | 26 | #ifndef REG_CACHE_H | 
|  | 27 | #define REG_CACHE_H | 
|  | 28 |  | 
|  | 29 | /** @file prdfRegisterCache.H */ | 
|  | 30 |  | 
|  | 31 | #include <map> | 
| Zane Shelley | 52cb1a9 | 2019-08-21 14:38:31 -0500 | [diff] [blame] | 32 |  | 
|  | 33 | #include <util/hei_bit_string.hpp> | 
|  | 34 |  | 
| Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 35 | #include <prdfGlobal.H> | 
|  | 36 | #include <prdfScanFacility.H> | 
| Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 37 | #include <prdfTargetFwdRef.H> | 
|  | 38 |  | 
| Zane Shelley | fd275a2 | 2019-09-05 23:13:59 -0500 | [diff] [blame] | 39 | namespace libhei | 
| Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 40 | { | 
|  | 41 | /** | 
|  | 42 | * @brief Caches the contents of registers used during analysis. | 
|  | 43 | * | 
|  | 44 | * It maintains the latest content of a register in a map. If contents of the | 
|  | 45 | * register remain unchanged, register read returns contents stored in | 
|  | 46 | * cache rather than reading from hardware. Hence it brings efficiency in read. | 
|  | 47 | * Whenever write to actual hardware takes place, it is expected that once write | 
|  | 48 | * to hardware succeeds, the user of cache shall call flush. It drops the | 
|  | 49 | * particular register from map. As a result, when read takes place from same | 
|  | 50 | * register next time, read from cache fails and actual access to hardware | 
|  | 51 | * takes place. | 
|  | 52 | */ | 
|  | 53 | class RegDataCache | 
|  | 54 | { | 
|  | 55 | public: | 
|  | 56 |  | 
|  | 57 | /** | 
|  | 58 | * @brief Constructor | 
|  | 59 | */ | 
|  | 60 | RegDataCache() | 
|  | 61 | { } | 
|  | 62 |  | 
|  | 63 | /** | 
|  | 64 | * @brief Destructor | 
|  | 65 | */ | 
|  | 66 | ~RegDataCache(); | 
|  | 67 |  | 
|  | 68 | /** | 
|  | 69 | * @brief  Returns reference to singleton instance of the RegDataCache. | 
|  | 70 | * @return The singleton reference. | 
|  | 71 | */ | 
|  | 72 | static RegDataCache & getCachedRegisters(); | 
|  | 73 |  | 
|  | 74 | /** | 
|  | 75 | * @brief Returns the data buffer for the given target and address. | 
|  | 76 | * @param i_chip The target associated with the register. | 
|  | 77 | * @param i_reg  Pointer to register to be read. | 
|  | 78 | * @return A reference to the data buffer associated with the register. | 
|  | 79 | */ | 
|  | 80 | BitString & read( ExtensibleChip * i_chip, | 
| Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 81 | const Register * i_reg ); | 
| Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 82 |  | 
|  | 83 | /** | 
|  | 84 | * @brief Flushes entire contents from cache. | 
|  | 85 | */ | 
|  | 86 | void flush(); | 
|  | 87 |  | 
|  | 88 | /** | 
|  | 89 | * @brief Removes a single entry from the cache. | 
|  | 90 | * @param i_pChip       The rulechip  associated with the register. | 
|  | 91 | * @param i_pRegister   points to the register to be flushed from cache. | 
|  | 92 | */ | 
|  | 93 | void flush( ExtensibleChip* i_pChip, | 
| Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 94 | const Register * i_pRegister ); | 
| Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 95 | /** | 
|  | 96 | * @brief Queries if a specific entry exist in cache. | 
|  | 97 | * @param i_pChip       The rulechip  associated with the register. | 
|  | 98 | * @param i_pRegister   base part of register entry to be queried in cache. | 
|  | 99 | * @return pointer to cache entry associated with a given register | 
|  | 100 | */ | 
|  | 101 | BitString * queryCache( ExtensibleChip* i_pChip, | 
| Zane Shelley | 23244cb | 2019-08-30 21:12:12 -0500 | [diff] [blame] | 102 | const Register * i_pRegister )const; | 
| Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 103 | /** | 
|  | 104 | * @brief Queries if a specific entry exist in cache. | 
|  | 105 | * @param i_scomAccessKey Reference to register to be queried. | 
|  | 106 | * @return pointer to cache entry associated with a given register | 
|  | 107 | */ | 
|  | 108 |  | 
|  | 109 | BitString * queryCache( | 
|  | 110 | const ScomRegisterAccess & i_scomAccessKey )const; | 
|  | 111 | private: // data | 
|  | 112 |  | 
|  | 113 | typedef std::map<ScomRegisterAccess, BitString *> CacheDump; | 
|  | 114 | CacheDump iv_cachedRead; | 
|  | 115 |  | 
|  | 116 | }; | 
|  | 117 |  | 
|  | 118 | PRDF_DECLARE_SINGLETON(RegDataCache, ReadCache); | 
|  | 119 |  | 
| Zane Shelley | fd275a2 | 2019-09-05 23:13:59 -0500 | [diff] [blame] | 120 | } // end namespace libhei | 
| Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 121 |  | 
|  | 122 | #endif // REG_CACHE_H | 
|  | 123 |  |