Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 2 | <attn_node model_ec="P10_20" name="EQ_CORE_FIR" reg_type="SCOM"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 3 | <register name="EQ_CORE_FIR"> |
| 4 | <instance addr="0x20028440" reg_inst="0"/> |
| 5 | <instance addr="0x20024440" reg_inst="1"/> |
| 6 | <instance addr="0x20022440" reg_inst="2"/> |
| 7 | <instance addr="0x20021440" reg_inst="3"/> |
| 8 | <instance addr="0x21028440" reg_inst="4"/> |
| 9 | <instance addr="0x21024440" reg_inst="5"/> |
| 10 | <instance addr="0x21022440" reg_inst="6"/> |
| 11 | <instance addr="0x21021440" reg_inst="7"/> |
| 12 | <instance addr="0x22028440" reg_inst="8"/> |
| 13 | <instance addr="0x22024440" reg_inst="9"/> |
| 14 | <instance addr="0x22022440" reg_inst="10"/> |
| 15 | <instance addr="0x22021440" reg_inst="11"/> |
| 16 | <instance addr="0x23028440" reg_inst="12"/> |
| 17 | <instance addr="0x23024440" reg_inst="13"/> |
| 18 | <instance addr="0x23022440" reg_inst="14"/> |
| 19 | <instance addr="0x23021440" reg_inst="15"/> |
| 20 | <instance addr="0x24028440" reg_inst="16"/> |
| 21 | <instance addr="0x24024440" reg_inst="17"/> |
| 22 | <instance addr="0x24022440" reg_inst="18"/> |
| 23 | <instance addr="0x24021440" reg_inst="19"/> |
| 24 | <instance addr="0x25028440" reg_inst="20"/> |
| 25 | <instance addr="0x25024440" reg_inst="21"/> |
| 26 | <instance addr="0x25022440" reg_inst="22"/> |
| 27 | <instance addr="0x25021440" reg_inst="23"/> |
| 28 | <instance addr="0x26028440" reg_inst="24"/> |
| 29 | <instance addr="0x26024440" reg_inst="25"/> |
| 30 | <instance addr="0x26022440" reg_inst="26"/> |
| 31 | <instance addr="0x26021440" reg_inst="27"/> |
| 32 | <instance addr="0x27028440" reg_inst="28"/> |
| 33 | <instance addr="0x27024440" reg_inst="29"/> |
| 34 | <instance addr="0x27022440" reg_inst="30"/> |
| 35 | <instance addr="0x27021440" reg_inst="31"/> |
| 36 | </register> |
| 37 | <register name="EQ_CORE_FIR_MASK"> |
| 38 | <instance addr="0x20028443" reg_inst="0"/> |
| 39 | <instance addr="0x20024443" reg_inst="1"/> |
| 40 | <instance addr="0x20022443" reg_inst="2"/> |
| 41 | <instance addr="0x20021443" reg_inst="3"/> |
| 42 | <instance addr="0x21028443" reg_inst="4"/> |
| 43 | <instance addr="0x21024443" reg_inst="5"/> |
| 44 | <instance addr="0x21022443" reg_inst="6"/> |
| 45 | <instance addr="0x21021443" reg_inst="7"/> |
| 46 | <instance addr="0x22028443" reg_inst="8"/> |
| 47 | <instance addr="0x22024443" reg_inst="9"/> |
| 48 | <instance addr="0x22022443" reg_inst="10"/> |
| 49 | <instance addr="0x22021443" reg_inst="11"/> |
| 50 | <instance addr="0x23028443" reg_inst="12"/> |
| 51 | <instance addr="0x23024443" reg_inst="13"/> |
| 52 | <instance addr="0x23022443" reg_inst="14"/> |
| 53 | <instance addr="0x23021443" reg_inst="15"/> |
| 54 | <instance addr="0x24028443" reg_inst="16"/> |
| 55 | <instance addr="0x24024443" reg_inst="17"/> |
| 56 | <instance addr="0x24022443" reg_inst="18"/> |
| 57 | <instance addr="0x24021443" reg_inst="19"/> |
| 58 | <instance addr="0x25028443" reg_inst="20"/> |
| 59 | <instance addr="0x25024443" reg_inst="21"/> |
| 60 | <instance addr="0x25022443" reg_inst="22"/> |
| 61 | <instance addr="0x25021443" reg_inst="23"/> |
| 62 | <instance addr="0x26028443" reg_inst="24"/> |
| 63 | <instance addr="0x26024443" reg_inst="25"/> |
| 64 | <instance addr="0x26022443" reg_inst="26"/> |
| 65 | <instance addr="0x26021443" reg_inst="27"/> |
| 66 | <instance addr="0x27028443" reg_inst="28"/> |
| 67 | <instance addr="0x27024443" reg_inst="29"/> |
| 68 | <instance addr="0x27022443" reg_inst="30"/> |
| 69 | <instance addr="0x27021443" reg_inst="31"/> |
| 70 | </register> |
| 71 | <register name="EQ_CORE_FIR_ACT0"> |
| 72 | <instance addr="0x20028446" reg_inst="0"/> |
| 73 | <instance addr="0x20024446" reg_inst="1"/> |
| 74 | <instance addr="0x20022446" reg_inst="2"/> |
| 75 | <instance addr="0x20021446" reg_inst="3"/> |
| 76 | <instance addr="0x21028446" reg_inst="4"/> |
| 77 | <instance addr="0x21024446" reg_inst="5"/> |
| 78 | <instance addr="0x21022446" reg_inst="6"/> |
| 79 | <instance addr="0x21021446" reg_inst="7"/> |
| 80 | <instance addr="0x22028446" reg_inst="8"/> |
| 81 | <instance addr="0x22024446" reg_inst="9"/> |
| 82 | <instance addr="0x22022446" reg_inst="10"/> |
| 83 | <instance addr="0x22021446" reg_inst="11"/> |
| 84 | <instance addr="0x23028446" reg_inst="12"/> |
| 85 | <instance addr="0x23024446" reg_inst="13"/> |
| 86 | <instance addr="0x23022446" reg_inst="14"/> |
| 87 | <instance addr="0x23021446" reg_inst="15"/> |
| 88 | <instance addr="0x24028446" reg_inst="16"/> |
| 89 | <instance addr="0x24024446" reg_inst="17"/> |
| 90 | <instance addr="0x24022446" reg_inst="18"/> |
| 91 | <instance addr="0x24021446" reg_inst="19"/> |
| 92 | <instance addr="0x25028446" reg_inst="20"/> |
| 93 | <instance addr="0x25024446" reg_inst="21"/> |
| 94 | <instance addr="0x25022446" reg_inst="22"/> |
| 95 | <instance addr="0x25021446" reg_inst="23"/> |
| 96 | <instance addr="0x26028446" reg_inst="24"/> |
| 97 | <instance addr="0x26024446" reg_inst="25"/> |
| 98 | <instance addr="0x26022446" reg_inst="26"/> |
| 99 | <instance addr="0x26021446" reg_inst="27"/> |
| 100 | <instance addr="0x27028446" reg_inst="28"/> |
| 101 | <instance addr="0x27024446" reg_inst="29"/> |
| 102 | <instance addr="0x27022446" reg_inst="30"/> |
| 103 | <instance addr="0x27021446" reg_inst="31"/> |
| 104 | </register> |
| 105 | <register name="EQ_CORE_FIR_ACT1"> |
| 106 | <instance addr="0x20028447" reg_inst="0"/> |
| 107 | <instance addr="0x20024447" reg_inst="1"/> |
| 108 | <instance addr="0x20022447" reg_inst="2"/> |
| 109 | <instance addr="0x20021447" reg_inst="3"/> |
| 110 | <instance addr="0x21028447" reg_inst="4"/> |
| 111 | <instance addr="0x21024447" reg_inst="5"/> |
| 112 | <instance addr="0x21022447" reg_inst="6"/> |
| 113 | <instance addr="0x21021447" reg_inst="7"/> |
| 114 | <instance addr="0x22028447" reg_inst="8"/> |
| 115 | <instance addr="0x22024447" reg_inst="9"/> |
| 116 | <instance addr="0x22022447" reg_inst="10"/> |
| 117 | <instance addr="0x22021447" reg_inst="11"/> |
| 118 | <instance addr="0x23028447" reg_inst="12"/> |
| 119 | <instance addr="0x23024447" reg_inst="13"/> |
| 120 | <instance addr="0x23022447" reg_inst="14"/> |
| 121 | <instance addr="0x23021447" reg_inst="15"/> |
| 122 | <instance addr="0x24028447" reg_inst="16"/> |
| 123 | <instance addr="0x24024447" reg_inst="17"/> |
| 124 | <instance addr="0x24022447" reg_inst="18"/> |
| 125 | <instance addr="0x24021447" reg_inst="19"/> |
| 126 | <instance addr="0x25028447" reg_inst="20"/> |
| 127 | <instance addr="0x25024447" reg_inst="21"/> |
| 128 | <instance addr="0x25022447" reg_inst="22"/> |
| 129 | <instance addr="0x25021447" reg_inst="23"/> |
| 130 | <instance addr="0x26028447" reg_inst="24"/> |
| 131 | <instance addr="0x26024447" reg_inst="25"/> |
| 132 | <instance addr="0x26022447" reg_inst="26"/> |
| 133 | <instance addr="0x26021447" reg_inst="27"/> |
| 134 | <instance addr="0x27028447" reg_inst="28"/> |
| 135 | <instance addr="0x27024447" reg_inst="29"/> |
| 136 | <instance addr="0x27022447" reg_inst="30"/> |
| 137 | <instance addr="0x27021447" reg_inst="31"/> |
| 138 | </register> |
| 139 | <register name="EQ_CORE_FIR_WOF"> |
| 140 | <instance addr="0x20028448" reg_inst="0"/> |
| 141 | <instance addr="0x20024448" reg_inst="1"/> |
| 142 | <instance addr="0x20022448" reg_inst="2"/> |
| 143 | <instance addr="0x20021448" reg_inst="3"/> |
| 144 | <instance addr="0x21028448" reg_inst="4"/> |
| 145 | <instance addr="0x21024448" reg_inst="5"/> |
| 146 | <instance addr="0x21022448" reg_inst="6"/> |
| 147 | <instance addr="0x21021448" reg_inst="7"/> |
| 148 | <instance addr="0x22028448" reg_inst="8"/> |
| 149 | <instance addr="0x22024448" reg_inst="9"/> |
| 150 | <instance addr="0x22022448" reg_inst="10"/> |
| 151 | <instance addr="0x22021448" reg_inst="11"/> |
| 152 | <instance addr="0x23028448" reg_inst="12"/> |
| 153 | <instance addr="0x23024448" reg_inst="13"/> |
| 154 | <instance addr="0x23022448" reg_inst="14"/> |
| 155 | <instance addr="0x23021448" reg_inst="15"/> |
| 156 | <instance addr="0x24028448" reg_inst="16"/> |
| 157 | <instance addr="0x24024448" reg_inst="17"/> |
| 158 | <instance addr="0x24022448" reg_inst="18"/> |
| 159 | <instance addr="0x24021448" reg_inst="19"/> |
| 160 | <instance addr="0x25028448" reg_inst="20"/> |
| 161 | <instance addr="0x25024448" reg_inst="21"/> |
| 162 | <instance addr="0x25022448" reg_inst="22"/> |
| 163 | <instance addr="0x25021448" reg_inst="23"/> |
| 164 | <instance addr="0x26028448" reg_inst="24"/> |
| 165 | <instance addr="0x26024448" reg_inst="25"/> |
| 166 | <instance addr="0x26022448" reg_inst="26"/> |
| 167 | <instance addr="0x26021448" reg_inst="27"/> |
| 168 | <instance addr="0x27028448" reg_inst="28"/> |
| 169 | <instance addr="0x27024448" reg_inst="29"/> |
| 170 | <instance addr="0x27022448" reg_inst="30"/> |
| 171 | <instance addr="0x27021448" reg_inst="31"/> |
| 172 | </register> |
Zane Shelley | dfe36c8 | 2022-07-27 17:10:15 -0500 | [diff] [blame] | 173 | <register name="HV_PR_STATE"> |
| 174 | <instance addr="0x2002840D" reg_inst="0"/> |
| 175 | <instance addr="0x2002440D" reg_inst="1"/> |
| 176 | <instance addr="0x2002240D" reg_inst="2"/> |
| 177 | <instance addr="0x2002140D" reg_inst="3"/> |
| 178 | <instance addr="0x2102840D" reg_inst="4"/> |
| 179 | <instance addr="0x2102440D" reg_inst="5"/> |
| 180 | <instance addr="0x2102240D" reg_inst="6"/> |
| 181 | <instance addr="0x2102140D" reg_inst="7"/> |
| 182 | <instance addr="0x2202840D" reg_inst="8"/> |
| 183 | <instance addr="0x2202440D" reg_inst="9"/> |
| 184 | <instance addr="0x2202240D" reg_inst="10"/> |
| 185 | <instance addr="0x2202140D" reg_inst="11"/> |
| 186 | <instance addr="0x2302840D" reg_inst="12"/> |
| 187 | <instance addr="0x2302440D" reg_inst="13"/> |
| 188 | <instance addr="0x2302240D" reg_inst="14"/> |
| 189 | <instance addr="0x2302140D" reg_inst="15"/> |
| 190 | <instance addr="0x2402840D" reg_inst="16"/> |
| 191 | <instance addr="0x2402440D" reg_inst="17"/> |
| 192 | <instance addr="0x2402240D" reg_inst="18"/> |
| 193 | <instance addr="0x2402140D" reg_inst="19"/> |
| 194 | <instance addr="0x2502840D" reg_inst="20"/> |
| 195 | <instance addr="0x2502440D" reg_inst="21"/> |
| 196 | <instance addr="0x2502240D" reg_inst="22"/> |
| 197 | <instance addr="0x2502140D" reg_inst="23"/> |
| 198 | <instance addr="0x2602840D" reg_inst="24"/> |
| 199 | <instance addr="0x2602440D" reg_inst="25"/> |
| 200 | <instance addr="0x2602240D" reg_inst="26"/> |
| 201 | <instance addr="0x2602140D" reg_inst="27"/> |
| 202 | <instance addr="0x2702840D" reg_inst="28"/> |
| 203 | <instance addr="0x2702440D" reg_inst="29"/> |
| 204 | <instance addr="0x2702240D" reg_inst="30"/> |
| 205 | <instance addr="0x2702140D" reg_inst="31"/> |
| 206 | </register> |
Zane Shelley | 2e4b638 | 2021-09-24 14:22:00 -0500 | [diff] [blame] | 207 | <register name="PC_FIR_HOLD_OUT"> |
| 208 | <instance addr="0x20028451" reg_inst="0"/> |
| 209 | <instance addr="0x20024451" reg_inst="1"/> |
| 210 | <instance addr="0x20022451" reg_inst="2"/> |
| 211 | <instance addr="0x20021451" reg_inst="3"/> |
| 212 | <instance addr="0x21028451" reg_inst="4"/> |
| 213 | <instance addr="0x21024451" reg_inst="5"/> |
| 214 | <instance addr="0x21022451" reg_inst="6"/> |
| 215 | <instance addr="0x21021451" reg_inst="7"/> |
| 216 | <instance addr="0x22028451" reg_inst="8"/> |
| 217 | <instance addr="0x22024451" reg_inst="9"/> |
| 218 | <instance addr="0x22022451" reg_inst="10"/> |
| 219 | <instance addr="0x22021451" reg_inst="11"/> |
| 220 | <instance addr="0x23028451" reg_inst="12"/> |
| 221 | <instance addr="0x23024451" reg_inst="13"/> |
| 222 | <instance addr="0x23022451" reg_inst="14"/> |
| 223 | <instance addr="0x23021451" reg_inst="15"/> |
| 224 | <instance addr="0x24028451" reg_inst="16"/> |
| 225 | <instance addr="0x24024451" reg_inst="17"/> |
| 226 | <instance addr="0x24022451" reg_inst="18"/> |
| 227 | <instance addr="0x24021451" reg_inst="19"/> |
| 228 | <instance addr="0x25028451" reg_inst="20"/> |
| 229 | <instance addr="0x25024451" reg_inst="21"/> |
| 230 | <instance addr="0x25022451" reg_inst="22"/> |
| 231 | <instance addr="0x25021451" reg_inst="23"/> |
| 232 | <instance addr="0x26028451" reg_inst="24"/> |
| 233 | <instance addr="0x26024451" reg_inst="25"/> |
| 234 | <instance addr="0x26022451" reg_inst="26"/> |
| 235 | <instance addr="0x26021451" reg_inst="27"/> |
| 236 | <instance addr="0x27028451" reg_inst="28"/> |
| 237 | <instance addr="0x27024451" reg_inst="29"/> |
| 238 | <instance addr="0x27022451" reg_inst="30"/> |
| 239 | <instance addr="0x27021451" reg_inst="31"/> |
| 240 | </register> |
| 241 | <register name="THRCTL_HOLD_OUT"> |
| 242 | <instance addr="0x20028455" reg_inst="0"/> |
| 243 | <instance addr="0x20024455" reg_inst="1"/> |
| 244 | <instance addr="0x20022455" reg_inst="2"/> |
| 245 | <instance addr="0x20021455" reg_inst="3"/> |
| 246 | <instance addr="0x21028455" reg_inst="4"/> |
| 247 | <instance addr="0x21024455" reg_inst="5"/> |
| 248 | <instance addr="0x21022455" reg_inst="6"/> |
| 249 | <instance addr="0x21021455" reg_inst="7"/> |
| 250 | <instance addr="0x22028455" reg_inst="8"/> |
| 251 | <instance addr="0x22024455" reg_inst="9"/> |
| 252 | <instance addr="0x22022455" reg_inst="10"/> |
| 253 | <instance addr="0x22021455" reg_inst="11"/> |
| 254 | <instance addr="0x23028455" reg_inst="12"/> |
| 255 | <instance addr="0x23024455" reg_inst="13"/> |
| 256 | <instance addr="0x23022455" reg_inst="14"/> |
| 257 | <instance addr="0x23021455" reg_inst="15"/> |
| 258 | <instance addr="0x24028455" reg_inst="16"/> |
| 259 | <instance addr="0x24024455" reg_inst="17"/> |
| 260 | <instance addr="0x24022455" reg_inst="18"/> |
| 261 | <instance addr="0x24021455" reg_inst="19"/> |
| 262 | <instance addr="0x25028455" reg_inst="20"/> |
| 263 | <instance addr="0x25024455" reg_inst="21"/> |
| 264 | <instance addr="0x25022455" reg_inst="22"/> |
| 265 | <instance addr="0x25021455" reg_inst="23"/> |
| 266 | <instance addr="0x26028455" reg_inst="24"/> |
| 267 | <instance addr="0x26024455" reg_inst="25"/> |
| 268 | <instance addr="0x26022455" reg_inst="26"/> |
| 269 | <instance addr="0x26021455" reg_inst="27"/> |
| 270 | <instance addr="0x27028455" reg_inst="28"/> |
| 271 | <instance addr="0x27024455" reg_inst="29"/> |
| 272 | <instance addr="0x27022455" reg_inst="30"/> |
| 273 | <instance addr="0x27021455" reg_inst="31"/> |
| 274 | </register> |
| 275 | <register name="VSU_HOLD_OUT"> |
| 276 | <instance addr="0x200284B6" reg_inst="0"/> |
| 277 | <instance addr="0x200244B6" reg_inst="1"/> |
| 278 | <instance addr="0x200224B6" reg_inst="2"/> |
| 279 | <instance addr="0x200214B6" reg_inst="3"/> |
| 280 | <instance addr="0x210284B6" reg_inst="4"/> |
| 281 | <instance addr="0x210244B6" reg_inst="5"/> |
| 282 | <instance addr="0x210224B6" reg_inst="6"/> |
| 283 | <instance addr="0x210214B6" reg_inst="7"/> |
| 284 | <instance addr="0x220284B6" reg_inst="8"/> |
| 285 | <instance addr="0x220244B6" reg_inst="9"/> |
| 286 | <instance addr="0x220224B6" reg_inst="10"/> |
| 287 | <instance addr="0x220214B6" reg_inst="11"/> |
| 288 | <instance addr="0x230284B6" reg_inst="12"/> |
| 289 | <instance addr="0x230244B6" reg_inst="13"/> |
| 290 | <instance addr="0x230224B6" reg_inst="14"/> |
| 291 | <instance addr="0x230214B6" reg_inst="15"/> |
| 292 | <instance addr="0x240284B6" reg_inst="16"/> |
| 293 | <instance addr="0x240244B6" reg_inst="17"/> |
| 294 | <instance addr="0x240224B6" reg_inst="18"/> |
| 295 | <instance addr="0x240214B6" reg_inst="19"/> |
| 296 | <instance addr="0x250284B6" reg_inst="20"/> |
| 297 | <instance addr="0x250244B6" reg_inst="21"/> |
| 298 | <instance addr="0x250224B6" reg_inst="22"/> |
| 299 | <instance addr="0x250214B6" reg_inst="23"/> |
| 300 | <instance addr="0x260284B6" reg_inst="24"/> |
| 301 | <instance addr="0x260244B6" reg_inst="25"/> |
| 302 | <instance addr="0x260224B6" reg_inst="26"/> |
| 303 | <instance addr="0x260214B6" reg_inst="27"/> |
| 304 | <instance addr="0x270284B6" reg_inst="28"/> |
| 305 | <instance addr="0x270244B6" reg_inst="29"/> |
| 306 | <instance addr="0x270224B6" reg_inst="30"/> |
| 307 | <instance addr="0x270214B6" reg_inst="31"/> |
| 308 | </register> |
| 309 | <register name="TFAC_HOLD_OUT"> |
| 310 | <instance addr="0x200284B7" reg_inst="0"/> |
| 311 | <instance addr="0x200244B7" reg_inst="1"/> |
| 312 | <instance addr="0x200224B7" reg_inst="2"/> |
| 313 | <instance addr="0x200214B7" reg_inst="3"/> |
| 314 | <instance addr="0x210284B7" reg_inst="4"/> |
| 315 | <instance addr="0x210244B7" reg_inst="5"/> |
| 316 | <instance addr="0x210224B7" reg_inst="6"/> |
| 317 | <instance addr="0x210214B7" reg_inst="7"/> |
| 318 | <instance addr="0x220284B7" reg_inst="8"/> |
| 319 | <instance addr="0x220244B7" reg_inst="9"/> |
| 320 | <instance addr="0x220224B7" reg_inst="10"/> |
| 321 | <instance addr="0x220214B7" reg_inst="11"/> |
| 322 | <instance addr="0x230284B7" reg_inst="12"/> |
| 323 | <instance addr="0x230244B7" reg_inst="13"/> |
| 324 | <instance addr="0x230224B7" reg_inst="14"/> |
| 325 | <instance addr="0x230214B7" reg_inst="15"/> |
| 326 | <instance addr="0x240284B7" reg_inst="16"/> |
| 327 | <instance addr="0x240244B7" reg_inst="17"/> |
| 328 | <instance addr="0x240224B7" reg_inst="18"/> |
| 329 | <instance addr="0x240214B7" reg_inst="19"/> |
| 330 | <instance addr="0x250284B7" reg_inst="20"/> |
| 331 | <instance addr="0x250244B7" reg_inst="21"/> |
| 332 | <instance addr="0x250224B7" reg_inst="22"/> |
| 333 | <instance addr="0x250214B7" reg_inst="23"/> |
| 334 | <instance addr="0x260284B7" reg_inst="24"/> |
| 335 | <instance addr="0x260244B7" reg_inst="25"/> |
| 336 | <instance addr="0x260224B7" reg_inst="26"/> |
| 337 | <instance addr="0x260214B7" reg_inst="27"/> |
| 338 | <instance addr="0x270284B7" reg_inst="28"/> |
| 339 | <instance addr="0x270244B7" reg_inst="29"/> |
| 340 | <instance addr="0x270224B7" reg_inst="30"/> |
| 341 | <instance addr="0x270214B7" reg_inst="31"/> |
| 342 | </register> |
| 343 | <register name="IFU_HOLD_OUT0"> |
| 344 | <instance addr="0x20028600" reg_inst="0"/> |
| 345 | <instance addr="0x20024600" reg_inst="1"/> |
| 346 | <instance addr="0x20022600" reg_inst="2"/> |
| 347 | <instance addr="0x20021600" reg_inst="3"/> |
| 348 | <instance addr="0x21028600" reg_inst="4"/> |
| 349 | <instance addr="0x21024600" reg_inst="5"/> |
| 350 | <instance addr="0x21022600" reg_inst="6"/> |
| 351 | <instance addr="0x21021600" reg_inst="7"/> |
| 352 | <instance addr="0x22028600" reg_inst="8"/> |
| 353 | <instance addr="0x22024600" reg_inst="9"/> |
| 354 | <instance addr="0x22022600" reg_inst="10"/> |
| 355 | <instance addr="0x22021600" reg_inst="11"/> |
| 356 | <instance addr="0x23028600" reg_inst="12"/> |
| 357 | <instance addr="0x23024600" reg_inst="13"/> |
| 358 | <instance addr="0x23022600" reg_inst="14"/> |
| 359 | <instance addr="0x23021600" reg_inst="15"/> |
| 360 | <instance addr="0x24028600" reg_inst="16"/> |
| 361 | <instance addr="0x24024600" reg_inst="17"/> |
| 362 | <instance addr="0x24022600" reg_inst="18"/> |
| 363 | <instance addr="0x24021600" reg_inst="19"/> |
| 364 | <instance addr="0x25028600" reg_inst="20"/> |
| 365 | <instance addr="0x25024600" reg_inst="21"/> |
| 366 | <instance addr="0x25022600" reg_inst="22"/> |
| 367 | <instance addr="0x25021600" reg_inst="23"/> |
| 368 | <instance addr="0x26028600" reg_inst="24"/> |
| 369 | <instance addr="0x26024600" reg_inst="25"/> |
| 370 | <instance addr="0x26022600" reg_inst="26"/> |
| 371 | <instance addr="0x26021600" reg_inst="27"/> |
| 372 | <instance addr="0x27028600" reg_inst="28"/> |
| 373 | <instance addr="0x27024600" reg_inst="29"/> |
| 374 | <instance addr="0x27022600" reg_inst="30"/> |
| 375 | <instance addr="0x27021600" reg_inst="31"/> |
| 376 | </register> |
| 377 | <register name="IFU_HOLD_OUT1"> |
| 378 | <instance addr="0x20028601" reg_inst="0"/> |
| 379 | <instance addr="0x20024601" reg_inst="1"/> |
| 380 | <instance addr="0x20022601" reg_inst="2"/> |
| 381 | <instance addr="0x20021601" reg_inst="3"/> |
| 382 | <instance addr="0x21028601" reg_inst="4"/> |
| 383 | <instance addr="0x21024601" reg_inst="5"/> |
| 384 | <instance addr="0x21022601" reg_inst="6"/> |
| 385 | <instance addr="0x21021601" reg_inst="7"/> |
| 386 | <instance addr="0x22028601" reg_inst="8"/> |
| 387 | <instance addr="0x22024601" reg_inst="9"/> |
| 388 | <instance addr="0x22022601" reg_inst="10"/> |
| 389 | <instance addr="0x22021601" reg_inst="11"/> |
| 390 | <instance addr="0x23028601" reg_inst="12"/> |
| 391 | <instance addr="0x23024601" reg_inst="13"/> |
| 392 | <instance addr="0x23022601" reg_inst="14"/> |
| 393 | <instance addr="0x23021601" reg_inst="15"/> |
| 394 | <instance addr="0x24028601" reg_inst="16"/> |
| 395 | <instance addr="0x24024601" reg_inst="17"/> |
| 396 | <instance addr="0x24022601" reg_inst="18"/> |
| 397 | <instance addr="0x24021601" reg_inst="19"/> |
| 398 | <instance addr="0x25028601" reg_inst="20"/> |
| 399 | <instance addr="0x25024601" reg_inst="21"/> |
| 400 | <instance addr="0x25022601" reg_inst="22"/> |
| 401 | <instance addr="0x25021601" reg_inst="23"/> |
| 402 | <instance addr="0x26028601" reg_inst="24"/> |
| 403 | <instance addr="0x26024601" reg_inst="25"/> |
| 404 | <instance addr="0x26022601" reg_inst="26"/> |
| 405 | <instance addr="0x26021601" reg_inst="27"/> |
| 406 | <instance addr="0x27028601" reg_inst="28"/> |
| 407 | <instance addr="0x27024601" reg_inst="29"/> |
| 408 | <instance addr="0x27022601" reg_inst="30"/> |
| 409 | <instance addr="0x27021601" reg_inst="31"/> |
| 410 | </register> |
| 411 | <register name="IFU_HOLD_OUT2"> |
| 412 | <instance addr="0x20028602" reg_inst="0"/> |
| 413 | <instance addr="0x20024602" reg_inst="1"/> |
| 414 | <instance addr="0x20022602" reg_inst="2"/> |
| 415 | <instance addr="0x20021602" reg_inst="3"/> |
| 416 | <instance addr="0x21028602" reg_inst="4"/> |
| 417 | <instance addr="0x21024602" reg_inst="5"/> |
| 418 | <instance addr="0x21022602" reg_inst="6"/> |
| 419 | <instance addr="0x21021602" reg_inst="7"/> |
| 420 | <instance addr="0x22028602" reg_inst="8"/> |
| 421 | <instance addr="0x22024602" reg_inst="9"/> |
| 422 | <instance addr="0x22022602" reg_inst="10"/> |
| 423 | <instance addr="0x22021602" reg_inst="11"/> |
| 424 | <instance addr="0x23028602" reg_inst="12"/> |
| 425 | <instance addr="0x23024602" reg_inst="13"/> |
| 426 | <instance addr="0x23022602" reg_inst="14"/> |
| 427 | <instance addr="0x23021602" reg_inst="15"/> |
| 428 | <instance addr="0x24028602" reg_inst="16"/> |
| 429 | <instance addr="0x24024602" reg_inst="17"/> |
| 430 | <instance addr="0x24022602" reg_inst="18"/> |
| 431 | <instance addr="0x24021602" reg_inst="19"/> |
| 432 | <instance addr="0x25028602" reg_inst="20"/> |
| 433 | <instance addr="0x25024602" reg_inst="21"/> |
| 434 | <instance addr="0x25022602" reg_inst="22"/> |
| 435 | <instance addr="0x25021602" reg_inst="23"/> |
| 436 | <instance addr="0x26028602" reg_inst="24"/> |
| 437 | <instance addr="0x26024602" reg_inst="25"/> |
| 438 | <instance addr="0x26022602" reg_inst="26"/> |
| 439 | <instance addr="0x26021602" reg_inst="27"/> |
| 440 | <instance addr="0x27028602" reg_inst="28"/> |
| 441 | <instance addr="0x27024602" reg_inst="29"/> |
| 442 | <instance addr="0x27022602" reg_inst="30"/> |
| 443 | <instance addr="0x27021602" reg_inst="31"/> |
| 444 | </register> |
| 445 | <register name="IFU_HOLD_OUT3"> |
| 446 | <instance addr="0x20028603" reg_inst="0"/> |
| 447 | <instance addr="0x20024603" reg_inst="1"/> |
| 448 | <instance addr="0x20022603" reg_inst="2"/> |
| 449 | <instance addr="0x20021603" reg_inst="3"/> |
| 450 | <instance addr="0x21028603" reg_inst="4"/> |
| 451 | <instance addr="0x21024603" reg_inst="5"/> |
| 452 | <instance addr="0x21022603" reg_inst="6"/> |
| 453 | <instance addr="0x21021603" reg_inst="7"/> |
| 454 | <instance addr="0x22028603" reg_inst="8"/> |
| 455 | <instance addr="0x22024603" reg_inst="9"/> |
| 456 | <instance addr="0x22022603" reg_inst="10"/> |
| 457 | <instance addr="0x22021603" reg_inst="11"/> |
| 458 | <instance addr="0x23028603" reg_inst="12"/> |
| 459 | <instance addr="0x23024603" reg_inst="13"/> |
| 460 | <instance addr="0x23022603" reg_inst="14"/> |
| 461 | <instance addr="0x23021603" reg_inst="15"/> |
| 462 | <instance addr="0x24028603" reg_inst="16"/> |
| 463 | <instance addr="0x24024603" reg_inst="17"/> |
| 464 | <instance addr="0x24022603" reg_inst="18"/> |
| 465 | <instance addr="0x24021603" reg_inst="19"/> |
| 466 | <instance addr="0x25028603" reg_inst="20"/> |
| 467 | <instance addr="0x25024603" reg_inst="21"/> |
| 468 | <instance addr="0x25022603" reg_inst="22"/> |
| 469 | <instance addr="0x25021603" reg_inst="23"/> |
| 470 | <instance addr="0x26028603" reg_inst="24"/> |
| 471 | <instance addr="0x26024603" reg_inst="25"/> |
| 472 | <instance addr="0x26022603" reg_inst="26"/> |
| 473 | <instance addr="0x26021603" reg_inst="27"/> |
| 474 | <instance addr="0x27028603" reg_inst="28"/> |
| 475 | <instance addr="0x27024603" reg_inst="29"/> |
| 476 | <instance addr="0x27022603" reg_inst="30"/> |
| 477 | <instance addr="0x27021603" reg_inst="31"/> |
| 478 | </register> |
| 479 | <register name="ISU_HOLD_OUT0"> |
| 480 | <instance addr="0x20028640" reg_inst="0"/> |
| 481 | <instance addr="0x20024640" reg_inst="1"/> |
| 482 | <instance addr="0x20022640" reg_inst="2"/> |
| 483 | <instance addr="0x20021640" reg_inst="3"/> |
| 484 | <instance addr="0x21028640" reg_inst="4"/> |
| 485 | <instance addr="0x21024640" reg_inst="5"/> |
| 486 | <instance addr="0x21022640" reg_inst="6"/> |
| 487 | <instance addr="0x21021640" reg_inst="7"/> |
| 488 | <instance addr="0x22028640" reg_inst="8"/> |
| 489 | <instance addr="0x22024640" reg_inst="9"/> |
| 490 | <instance addr="0x22022640" reg_inst="10"/> |
| 491 | <instance addr="0x22021640" reg_inst="11"/> |
| 492 | <instance addr="0x23028640" reg_inst="12"/> |
| 493 | <instance addr="0x23024640" reg_inst="13"/> |
| 494 | <instance addr="0x23022640" reg_inst="14"/> |
| 495 | <instance addr="0x23021640" reg_inst="15"/> |
| 496 | <instance addr="0x24028640" reg_inst="16"/> |
| 497 | <instance addr="0x24024640" reg_inst="17"/> |
| 498 | <instance addr="0x24022640" reg_inst="18"/> |
| 499 | <instance addr="0x24021640" reg_inst="19"/> |
| 500 | <instance addr="0x25028640" reg_inst="20"/> |
| 501 | <instance addr="0x25024640" reg_inst="21"/> |
| 502 | <instance addr="0x25022640" reg_inst="22"/> |
| 503 | <instance addr="0x25021640" reg_inst="23"/> |
| 504 | <instance addr="0x26028640" reg_inst="24"/> |
| 505 | <instance addr="0x26024640" reg_inst="25"/> |
| 506 | <instance addr="0x26022640" reg_inst="26"/> |
| 507 | <instance addr="0x26021640" reg_inst="27"/> |
| 508 | <instance addr="0x27028640" reg_inst="28"/> |
| 509 | <instance addr="0x27024640" reg_inst="29"/> |
| 510 | <instance addr="0x27022640" reg_inst="30"/> |
| 511 | <instance addr="0x27021640" reg_inst="31"/> |
| 512 | </register> |
| 513 | <register name="ISU_HOLD_OUT1"> |
| 514 | <instance addr="0x20028641" reg_inst="0"/> |
| 515 | <instance addr="0x20024641" reg_inst="1"/> |
| 516 | <instance addr="0x20022641" reg_inst="2"/> |
| 517 | <instance addr="0x20021641" reg_inst="3"/> |
| 518 | <instance addr="0x21028641" reg_inst="4"/> |
| 519 | <instance addr="0x21024641" reg_inst="5"/> |
| 520 | <instance addr="0x21022641" reg_inst="6"/> |
| 521 | <instance addr="0x21021641" reg_inst="7"/> |
| 522 | <instance addr="0x22028641" reg_inst="8"/> |
| 523 | <instance addr="0x22024641" reg_inst="9"/> |
| 524 | <instance addr="0x22022641" reg_inst="10"/> |
| 525 | <instance addr="0x22021641" reg_inst="11"/> |
| 526 | <instance addr="0x23028641" reg_inst="12"/> |
| 527 | <instance addr="0x23024641" reg_inst="13"/> |
| 528 | <instance addr="0x23022641" reg_inst="14"/> |
| 529 | <instance addr="0x23021641" reg_inst="15"/> |
| 530 | <instance addr="0x24028641" reg_inst="16"/> |
| 531 | <instance addr="0x24024641" reg_inst="17"/> |
| 532 | <instance addr="0x24022641" reg_inst="18"/> |
| 533 | <instance addr="0x24021641" reg_inst="19"/> |
| 534 | <instance addr="0x25028641" reg_inst="20"/> |
| 535 | <instance addr="0x25024641" reg_inst="21"/> |
| 536 | <instance addr="0x25022641" reg_inst="22"/> |
| 537 | <instance addr="0x25021641" reg_inst="23"/> |
| 538 | <instance addr="0x26028641" reg_inst="24"/> |
| 539 | <instance addr="0x26024641" reg_inst="25"/> |
| 540 | <instance addr="0x26022641" reg_inst="26"/> |
| 541 | <instance addr="0x26021641" reg_inst="27"/> |
| 542 | <instance addr="0x27028641" reg_inst="28"/> |
| 543 | <instance addr="0x27024641" reg_inst="29"/> |
| 544 | <instance addr="0x27022641" reg_inst="30"/> |
| 545 | <instance addr="0x27021641" reg_inst="31"/> |
| 546 | </register> |
| 547 | <register name="ISU_HOLD_OUT2"> |
| 548 | <instance addr="0x20028642" reg_inst="0"/> |
| 549 | <instance addr="0x20024642" reg_inst="1"/> |
| 550 | <instance addr="0x20022642" reg_inst="2"/> |
| 551 | <instance addr="0x20021642" reg_inst="3"/> |
| 552 | <instance addr="0x21028642" reg_inst="4"/> |
| 553 | <instance addr="0x21024642" reg_inst="5"/> |
| 554 | <instance addr="0x21022642" reg_inst="6"/> |
| 555 | <instance addr="0x21021642" reg_inst="7"/> |
| 556 | <instance addr="0x22028642" reg_inst="8"/> |
| 557 | <instance addr="0x22024642" reg_inst="9"/> |
| 558 | <instance addr="0x22022642" reg_inst="10"/> |
| 559 | <instance addr="0x22021642" reg_inst="11"/> |
| 560 | <instance addr="0x23028642" reg_inst="12"/> |
| 561 | <instance addr="0x23024642" reg_inst="13"/> |
| 562 | <instance addr="0x23022642" reg_inst="14"/> |
| 563 | <instance addr="0x23021642" reg_inst="15"/> |
| 564 | <instance addr="0x24028642" reg_inst="16"/> |
| 565 | <instance addr="0x24024642" reg_inst="17"/> |
| 566 | <instance addr="0x24022642" reg_inst="18"/> |
| 567 | <instance addr="0x24021642" reg_inst="19"/> |
| 568 | <instance addr="0x25028642" reg_inst="20"/> |
| 569 | <instance addr="0x25024642" reg_inst="21"/> |
| 570 | <instance addr="0x25022642" reg_inst="22"/> |
| 571 | <instance addr="0x25021642" reg_inst="23"/> |
| 572 | <instance addr="0x26028642" reg_inst="24"/> |
| 573 | <instance addr="0x26024642" reg_inst="25"/> |
| 574 | <instance addr="0x26022642" reg_inst="26"/> |
| 575 | <instance addr="0x26021642" reg_inst="27"/> |
| 576 | <instance addr="0x27028642" reg_inst="28"/> |
| 577 | <instance addr="0x27024642" reg_inst="29"/> |
| 578 | <instance addr="0x27022642" reg_inst="30"/> |
| 579 | <instance addr="0x27021642" reg_inst="31"/> |
| 580 | </register> |
| 581 | <register name="ISU_HOLD_OUT3"> |
| 582 | <instance addr="0x20028643" reg_inst="0"/> |
| 583 | <instance addr="0x20024643" reg_inst="1"/> |
| 584 | <instance addr="0x20022643" reg_inst="2"/> |
| 585 | <instance addr="0x20021643" reg_inst="3"/> |
| 586 | <instance addr="0x21028643" reg_inst="4"/> |
| 587 | <instance addr="0x21024643" reg_inst="5"/> |
| 588 | <instance addr="0x21022643" reg_inst="6"/> |
| 589 | <instance addr="0x21021643" reg_inst="7"/> |
| 590 | <instance addr="0x22028643" reg_inst="8"/> |
| 591 | <instance addr="0x22024643" reg_inst="9"/> |
| 592 | <instance addr="0x22022643" reg_inst="10"/> |
| 593 | <instance addr="0x22021643" reg_inst="11"/> |
| 594 | <instance addr="0x23028643" reg_inst="12"/> |
| 595 | <instance addr="0x23024643" reg_inst="13"/> |
| 596 | <instance addr="0x23022643" reg_inst="14"/> |
| 597 | <instance addr="0x23021643" reg_inst="15"/> |
| 598 | <instance addr="0x24028643" reg_inst="16"/> |
| 599 | <instance addr="0x24024643" reg_inst="17"/> |
| 600 | <instance addr="0x24022643" reg_inst="18"/> |
| 601 | <instance addr="0x24021643" reg_inst="19"/> |
| 602 | <instance addr="0x25028643" reg_inst="20"/> |
| 603 | <instance addr="0x25024643" reg_inst="21"/> |
| 604 | <instance addr="0x25022643" reg_inst="22"/> |
| 605 | <instance addr="0x25021643" reg_inst="23"/> |
| 606 | <instance addr="0x26028643" reg_inst="24"/> |
| 607 | <instance addr="0x26024643" reg_inst="25"/> |
| 608 | <instance addr="0x26022643" reg_inst="26"/> |
| 609 | <instance addr="0x26021643" reg_inst="27"/> |
| 610 | <instance addr="0x27028643" reg_inst="28"/> |
| 611 | <instance addr="0x27024643" reg_inst="29"/> |
| 612 | <instance addr="0x27022643" reg_inst="30"/> |
| 613 | <instance addr="0x27021643" reg_inst="31"/> |
| 614 | </register> |
Zane Shelley | dfe36c8 | 2022-07-27 17:10:15 -0500 | [diff] [blame] | 615 | <register name="MMU_HOLD_OUT0"> |
| 616 | <instance addr="0x20028680" reg_inst="0"/> |
| 617 | <instance addr="0x20024680" reg_inst="1"/> |
| 618 | <instance addr="0x20022680" reg_inst="2"/> |
| 619 | <instance addr="0x20021680" reg_inst="3"/> |
| 620 | <instance addr="0x21028680" reg_inst="4"/> |
| 621 | <instance addr="0x21024680" reg_inst="5"/> |
| 622 | <instance addr="0x21022680" reg_inst="6"/> |
| 623 | <instance addr="0x21021680" reg_inst="7"/> |
| 624 | <instance addr="0x22028680" reg_inst="8"/> |
| 625 | <instance addr="0x22024680" reg_inst="9"/> |
| 626 | <instance addr="0x22022680" reg_inst="10"/> |
| 627 | <instance addr="0x22021680" reg_inst="11"/> |
| 628 | <instance addr="0x23028680" reg_inst="12"/> |
| 629 | <instance addr="0x23024680" reg_inst="13"/> |
| 630 | <instance addr="0x23022680" reg_inst="14"/> |
| 631 | <instance addr="0x23021680" reg_inst="15"/> |
| 632 | <instance addr="0x24028680" reg_inst="16"/> |
| 633 | <instance addr="0x24024680" reg_inst="17"/> |
| 634 | <instance addr="0x24022680" reg_inst="18"/> |
| 635 | <instance addr="0x24021680" reg_inst="19"/> |
| 636 | <instance addr="0x25028680" reg_inst="20"/> |
| 637 | <instance addr="0x25024680" reg_inst="21"/> |
| 638 | <instance addr="0x25022680" reg_inst="22"/> |
| 639 | <instance addr="0x25021680" reg_inst="23"/> |
| 640 | <instance addr="0x26028680" reg_inst="24"/> |
| 641 | <instance addr="0x26024680" reg_inst="25"/> |
| 642 | <instance addr="0x26022680" reg_inst="26"/> |
| 643 | <instance addr="0x26021680" reg_inst="27"/> |
| 644 | <instance addr="0x27028680" reg_inst="28"/> |
| 645 | <instance addr="0x27024680" reg_inst="29"/> |
| 646 | <instance addr="0x27022680" reg_inst="30"/> |
| 647 | <instance addr="0x27021680" reg_inst="31"/> |
| 648 | </register> |
| 649 | <register name="MMU_HOLD_OUT1"> |
| 650 | <instance addr="0x20028681" reg_inst="0"/> |
| 651 | <instance addr="0x20024681" reg_inst="1"/> |
| 652 | <instance addr="0x20022681" reg_inst="2"/> |
| 653 | <instance addr="0x20021681" reg_inst="3"/> |
| 654 | <instance addr="0x21028681" reg_inst="4"/> |
| 655 | <instance addr="0x21024681" reg_inst="5"/> |
| 656 | <instance addr="0x21022681" reg_inst="6"/> |
| 657 | <instance addr="0x21021681" reg_inst="7"/> |
| 658 | <instance addr="0x22028681" reg_inst="8"/> |
| 659 | <instance addr="0x22024681" reg_inst="9"/> |
| 660 | <instance addr="0x22022681" reg_inst="10"/> |
| 661 | <instance addr="0x22021681" reg_inst="11"/> |
| 662 | <instance addr="0x23028681" reg_inst="12"/> |
| 663 | <instance addr="0x23024681" reg_inst="13"/> |
| 664 | <instance addr="0x23022681" reg_inst="14"/> |
| 665 | <instance addr="0x23021681" reg_inst="15"/> |
| 666 | <instance addr="0x24028681" reg_inst="16"/> |
| 667 | <instance addr="0x24024681" reg_inst="17"/> |
| 668 | <instance addr="0x24022681" reg_inst="18"/> |
| 669 | <instance addr="0x24021681" reg_inst="19"/> |
| 670 | <instance addr="0x25028681" reg_inst="20"/> |
| 671 | <instance addr="0x25024681" reg_inst="21"/> |
| 672 | <instance addr="0x25022681" reg_inst="22"/> |
| 673 | <instance addr="0x25021681" reg_inst="23"/> |
| 674 | <instance addr="0x26028681" reg_inst="24"/> |
| 675 | <instance addr="0x26024681" reg_inst="25"/> |
| 676 | <instance addr="0x26022681" reg_inst="26"/> |
| 677 | <instance addr="0x26021681" reg_inst="27"/> |
| 678 | <instance addr="0x27028681" reg_inst="28"/> |
| 679 | <instance addr="0x27024681" reg_inst="29"/> |
| 680 | <instance addr="0x27022681" reg_inst="30"/> |
| 681 | <instance addr="0x27021681" reg_inst="31"/> |
| 682 | </register> |
| 683 | <register name="MMU_HOLD_OUT2"> |
| 684 | <instance addr="0x20028682" reg_inst="0"/> |
| 685 | <instance addr="0x20024682" reg_inst="1"/> |
| 686 | <instance addr="0x20022682" reg_inst="2"/> |
| 687 | <instance addr="0x20021682" reg_inst="3"/> |
| 688 | <instance addr="0x21028682" reg_inst="4"/> |
| 689 | <instance addr="0x21024682" reg_inst="5"/> |
| 690 | <instance addr="0x21022682" reg_inst="6"/> |
| 691 | <instance addr="0x21021682" reg_inst="7"/> |
| 692 | <instance addr="0x22028682" reg_inst="8"/> |
| 693 | <instance addr="0x22024682" reg_inst="9"/> |
| 694 | <instance addr="0x22022682" reg_inst="10"/> |
| 695 | <instance addr="0x22021682" reg_inst="11"/> |
| 696 | <instance addr="0x23028682" reg_inst="12"/> |
| 697 | <instance addr="0x23024682" reg_inst="13"/> |
| 698 | <instance addr="0x23022682" reg_inst="14"/> |
| 699 | <instance addr="0x23021682" reg_inst="15"/> |
| 700 | <instance addr="0x24028682" reg_inst="16"/> |
| 701 | <instance addr="0x24024682" reg_inst="17"/> |
| 702 | <instance addr="0x24022682" reg_inst="18"/> |
| 703 | <instance addr="0x24021682" reg_inst="19"/> |
| 704 | <instance addr="0x25028682" reg_inst="20"/> |
| 705 | <instance addr="0x25024682" reg_inst="21"/> |
| 706 | <instance addr="0x25022682" reg_inst="22"/> |
| 707 | <instance addr="0x25021682" reg_inst="23"/> |
| 708 | <instance addr="0x26028682" reg_inst="24"/> |
| 709 | <instance addr="0x26024682" reg_inst="25"/> |
| 710 | <instance addr="0x26022682" reg_inst="26"/> |
| 711 | <instance addr="0x26021682" reg_inst="27"/> |
| 712 | <instance addr="0x27028682" reg_inst="28"/> |
| 713 | <instance addr="0x27024682" reg_inst="29"/> |
| 714 | <instance addr="0x27022682" reg_inst="30"/> |
| 715 | <instance addr="0x27021682" reg_inst="31"/> |
| 716 | </register> |
| 717 | <register name="MMU_HOLD_OUT3"> |
| 718 | <instance addr="0x20028683" reg_inst="0"/> |
| 719 | <instance addr="0x20024683" reg_inst="1"/> |
| 720 | <instance addr="0x20022683" reg_inst="2"/> |
| 721 | <instance addr="0x20021683" reg_inst="3"/> |
| 722 | <instance addr="0x21028683" reg_inst="4"/> |
| 723 | <instance addr="0x21024683" reg_inst="5"/> |
| 724 | <instance addr="0x21022683" reg_inst="6"/> |
| 725 | <instance addr="0x21021683" reg_inst="7"/> |
| 726 | <instance addr="0x22028683" reg_inst="8"/> |
| 727 | <instance addr="0x22024683" reg_inst="9"/> |
| 728 | <instance addr="0x22022683" reg_inst="10"/> |
| 729 | <instance addr="0x22021683" reg_inst="11"/> |
| 730 | <instance addr="0x23028683" reg_inst="12"/> |
| 731 | <instance addr="0x23024683" reg_inst="13"/> |
| 732 | <instance addr="0x23022683" reg_inst="14"/> |
| 733 | <instance addr="0x23021683" reg_inst="15"/> |
| 734 | <instance addr="0x24028683" reg_inst="16"/> |
| 735 | <instance addr="0x24024683" reg_inst="17"/> |
| 736 | <instance addr="0x24022683" reg_inst="18"/> |
| 737 | <instance addr="0x24021683" reg_inst="19"/> |
| 738 | <instance addr="0x25028683" reg_inst="20"/> |
| 739 | <instance addr="0x25024683" reg_inst="21"/> |
| 740 | <instance addr="0x25022683" reg_inst="22"/> |
| 741 | <instance addr="0x25021683" reg_inst="23"/> |
| 742 | <instance addr="0x26028683" reg_inst="24"/> |
| 743 | <instance addr="0x26024683" reg_inst="25"/> |
| 744 | <instance addr="0x26022683" reg_inst="26"/> |
| 745 | <instance addr="0x26021683" reg_inst="27"/> |
| 746 | <instance addr="0x27028683" reg_inst="28"/> |
| 747 | <instance addr="0x27024683" reg_inst="29"/> |
| 748 | <instance addr="0x27022683" reg_inst="30"/> |
| 749 | <instance addr="0x27021683" reg_inst="31"/> |
| 750 | </register> |
| 751 | <register name="MMU_HOLD_OUT4"> |
| 752 | <instance addr="0x20028684" reg_inst="0"/> |
| 753 | <instance addr="0x20024684" reg_inst="1"/> |
| 754 | <instance addr="0x20022684" reg_inst="2"/> |
| 755 | <instance addr="0x20021684" reg_inst="3"/> |
| 756 | <instance addr="0x21028684" reg_inst="4"/> |
| 757 | <instance addr="0x21024684" reg_inst="5"/> |
| 758 | <instance addr="0x21022684" reg_inst="6"/> |
| 759 | <instance addr="0x21021684" reg_inst="7"/> |
| 760 | <instance addr="0x22028684" reg_inst="8"/> |
| 761 | <instance addr="0x22024684" reg_inst="9"/> |
| 762 | <instance addr="0x22022684" reg_inst="10"/> |
| 763 | <instance addr="0x22021684" reg_inst="11"/> |
| 764 | <instance addr="0x23028684" reg_inst="12"/> |
| 765 | <instance addr="0x23024684" reg_inst="13"/> |
| 766 | <instance addr="0x23022684" reg_inst="14"/> |
| 767 | <instance addr="0x23021684" reg_inst="15"/> |
| 768 | <instance addr="0x24028684" reg_inst="16"/> |
| 769 | <instance addr="0x24024684" reg_inst="17"/> |
| 770 | <instance addr="0x24022684" reg_inst="18"/> |
| 771 | <instance addr="0x24021684" reg_inst="19"/> |
| 772 | <instance addr="0x25028684" reg_inst="20"/> |
| 773 | <instance addr="0x25024684" reg_inst="21"/> |
| 774 | <instance addr="0x25022684" reg_inst="22"/> |
| 775 | <instance addr="0x25021684" reg_inst="23"/> |
| 776 | <instance addr="0x26028684" reg_inst="24"/> |
| 777 | <instance addr="0x26024684" reg_inst="25"/> |
| 778 | <instance addr="0x26022684" reg_inst="26"/> |
| 779 | <instance addr="0x26021684" reg_inst="27"/> |
| 780 | <instance addr="0x27028684" reg_inst="28"/> |
| 781 | <instance addr="0x27024684" reg_inst="29"/> |
| 782 | <instance addr="0x27022684" reg_inst="30"/> |
| 783 | <instance addr="0x27021684" reg_inst="31"/> |
| 784 | </register> |
| 785 | <register name="MMU_HOLD_OUT5"> |
| 786 | <instance addr="0x20028685" reg_inst="0"/> |
| 787 | <instance addr="0x20024685" reg_inst="1"/> |
| 788 | <instance addr="0x20022685" reg_inst="2"/> |
| 789 | <instance addr="0x20021685" reg_inst="3"/> |
| 790 | <instance addr="0x21028685" reg_inst="4"/> |
| 791 | <instance addr="0x21024685" reg_inst="5"/> |
| 792 | <instance addr="0x21022685" reg_inst="6"/> |
| 793 | <instance addr="0x21021685" reg_inst="7"/> |
| 794 | <instance addr="0x22028685" reg_inst="8"/> |
| 795 | <instance addr="0x22024685" reg_inst="9"/> |
| 796 | <instance addr="0x22022685" reg_inst="10"/> |
| 797 | <instance addr="0x22021685" reg_inst="11"/> |
| 798 | <instance addr="0x23028685" reg_inst="12"/> |
| 799 | <instance addr="0x23024685" reg_inst="13"/> |
| 800 | <instance addr="0x23022685" reg_inst="14"/> |
| 801 | <instance addr="0x23021685" reg_inst="15"/> |
| 802 | <instance addr="0x24028685" reg_inst="16"/> |
| 803 | <instance addr="0x24024685" reg_inst="17"/> |
| 804 | <instance addr="0x24022685" reg_inst="18"/> |
| 805 | <instance addr="0x24021685" reg_inst="19"/> |
| 806 | <instance addr="0x25028685" reg_inst="20"/> |
| 807 | <instance addr="0x25024685" reg_inst="21"/> |
| 808 | <instance addr="0x25022685" reg_inst="22"/> |
| 809 | <instance addr="0x25021685" reg_inst="23"/> |
| 810 | <instance addr="0x26028685" reg_inst="24"/> |
| 811 | <instance addr="0x26024685" reg_inst="25"/> |
| 812 | <instance addr="0x26022685" reg_inst="26"/> |
| 813 | <instance addr="0x26021685" reg_inst="27"/> |
| 814 | <instance addr="0x27028685" reg_inst="28"/> |
| 815 | <instance addr="0x27024685" reg_inst="29"/> |
| 816 | <instance addr="0x27022685" reg_inst="30"/> |
| 817 | <instance addr="0x27021685" reg_inst="31"/> |
| 818 | </register> |
Zane Shelley | 2e4b638 | 2021-09-24 14:22:00 -0500 | [diff] [blame] | 819 | <register name="LSU_HOLD_OUT_REG0"> |
| 820 | <instance addr="0x200286C0" reg_inst="0"/> |
| 821 | <instance addr="0x200246C0" reg_inst="1"/> |
| 822 | <instance addr="0x200226C0" reg_inst="2"/> |
| 823 | <instance addr="0x200216C0" reg_inst="3"/> |
| 824 | <instance addr="0x210286C0" reg_inst="4"/> |
| 825 | <instance addr="0x210246C0" reg_inst="5"/> |
| 826 | <instance addr="0x210226C0" reg_inst="6"/> |
| 827 | <instance addr="0x210216C0" reg_inst="7"/> |
| 828 | <instance addr="0x220286C0" reg_inst="8"/> |
| 829 | <instance addr="0x220246C0" reg_inst="9"/> |
| 830 | <instance addr="0x220226C0" reg_inst="10"/> |
| 831 | <instance addr="0x220216C0" reg_inst="11"/> |
| 832 | <instance addr="0x230286C0" reg_inst="12"/> |
| 833 | <instance addr="0x230246C0" reg_inst="13"/> |
| 834 | <instance addr="0x230226C0" reg_inst="14"/> |
| 835 | <instance addr="0x230216C0" reg_inst="15"/> |
| 836 | <instance addr="0x240286C0" reg_inst="16"/> |
| 837 | <instance addr="0x240246C0" reg_inst="17"/> |
| 838 | <instance addr="0x240226C0" reg_inst="18"/> |
| 839 | <instance addr="0x240216C0" reg_inst="19"/> |
| 840 | <instance addr="0x250286C0" reg_inst="20"/> |
| 841 | <instance addr="0x250246C0" reg_inst="21"/> |
| 842 | <instance addr="0x250226C0" reg_inst="22"/> |
| 843 | <instance addr="0x250216C0" reg_inst="23"/> |
| 844 | <instance addr="0x260286C0" reg_inst="24"/> |
| 845 | <instance addr="0x260246C0" reg_inst="25"/> |
| 846 | <instance addr="0x260226C0" reg_inst="26"/> |
| 847 | <instance addr="0x260216C0" reg_inst="27"/> |
| 848 | <instance addr="0x270286C0" reg_inst="28"/> |
| 849 | <instance addr="0x270246C0" reg_inst="29"/> |
| 850 | <instance addr="0x270226C0" reg_inst="30"/> |
| 851 | <instance addr="0x270216C0" reg_inst="31"/> |
| 852 | </register> |
| 853 | <register name="LSU_HOLD_OUT_REG1"> |
| 854 | <instance addr="0x200286C1" reg_inst="0"/> |
| 855 | <instance addr="0x200246C1" reg_inst="1"/> |
| 856 | <instance addr="0x200226C1" reg_inst="2"/> |
| 857 | <instance addr="0x200216C1" reg_inst="3"/> |
| 858 | <instance addr="0x210286C1" reg_inst="4"/> |
| 859 | <instance addr="0x210246C1" reg_inst="5"/> |
| 860 | <instance addr="0x210226C1" reg_inst="6"/> |
| 861 | <instance addr="0x210216C1" reg_inst="7"/> |
| 862 | <instance addr="0x220286C1" reg_inst="8"/> |
| 863 | <instance addr="0x220246C1" reg_inst="9"/> |
| 864 | <instance addr="0x220226C1" reg_inst="10"/> |
| 865 | <instance addr="0x220216C1" reg_inst="11"/> |
| 866 | <instance addr="0x230286C1" reg_inst="12"/> |
| 867 | <instance addr="0x230246C1" reg_inst="13"/> |
| 868 | <instance addr="0x230226C1" reg_inst="14"/> |
| 869 | <instance addr="0x230216C1" reg_inst="15"/> |
| 870 | <instance addr="0x240286C1" reg_inst="16"/> |
| 871 | <instance addr="0x240246C1" reg_inst="17"/> |
| 872 | <instance addr="0x240226C1" reg_inst="18"/> |
| 873 | <instance addr="0x240216C1" reg_inst="19"/> |
| 874 | <instance addr="0x250286C1" reg_inst="20"/> |
| 875 | <instance addr="0x250246C1" reg_inst="21"/> |
| 876 | <instance addr="0x250226C1" reg_inst="22"/> |
| 877 | <instance addr="0x250216C1" reg_inst="23"/> |
| 878 | <instance addr="0x260286C1" reg_inst="24"/> |
| 879 | <instance addr="0x260246C1" reg_inst="25"/> |
| 880 | <instance addr="0x260226C1" reg_inst="26"/> |
| 881 | <instance addr="0x260216C1" reg_inst="27"/> |
| 882 | <instance addr="0x270286C1" reg_inst="28"/> |
| 883 | <instance addr="0x270246C1" reg_inst="29"/> |
| 884 | <instance addr="0x270226C1" reg_inst="30"/> |
| 885 | <instance addr="0x270216C1" reg_inst="31"/> |
| 886 | </register> |
| 887 | <register name="LSU_HOLD_OUT_REG2"> |
| 888 | <instance addr="0x200286C2" reg_inst="0"/> |
| 889 | <instance addr="0x200246C2" reg_inst="1"/> |
| 890 | <instance addr="0x200226C2" reg_inst="2"/> |
| 891 | <instance addr="0x200216C2" reg_inst="3"/> |
| 892 | <instance addr="0x210286C2" reg_inst="4"/> |
| 893 | <instance addr="0x210246C2" reg_inst="5"/> |
| 894 | <instance addr="0x210226C2" reg_inst="6"/> |
| 895 | <instance addr="0x210216C2" reg_inst="7"/> |
| 896 | <instance addr="0x220286C2" reg_inst="8"/> |
| 897 | <instance addr="0x220246C2" reg_inst="9"/> |
| 898 | <instance addr="0x220226C2" reg_inst="10"/> |
| 899 | <instance addr="0x220216C2" reg_inst="11"/> |
| 900 | <instance addr="0x230286C2" reg_inst="12"/> |
| 901 | <instance addr="0x230246C2" reg_inst="13"/> |
| 902 | <instance addr="0x230226C2" reg_inst="14"/> |
| 903 | <instance addr="0x230216C2" reg_inst="15"/> |
| 904 | <instance addr="0x240286C2" reg_inst="16"/> |
| 905 | <instance addr="0x240246C2" reg_inst="17"/> |
| 906 | <instance addr="0x240226C2" reg_inst="18"/> |
| 907 | <instance addr="0x240216C2" reg_inst="19"/> |
| 908 | <instance addr="0x250286C2" reg_inst="20"/> |
| 909 | <instance addr="0x250246C2" reg_inst="21"/> |
| 910 | <instance addr="0x250226C2" reg_inst="22"/> |
| 911 | <instance addr="0x250216C2" reg_inst="23"/> |
| 912 | <instance addr="0x260286C2" reg_inst="24"/> |
| 913 | <instance addr="0x260246C2" reg_inst="25"/> |
| 914 | <instance addr="0x260226C2" reg_inst="26"/> |
| 915 | <instance addr="0x260216C2" reg_inst="27"/> |
| 916 | <instance addr="0x270286C2" reg_inst="28"/> |
| 917 | <instance addr="0x270246C2" reg_inst="29"/> |
| 918 | <instance addr="0x270226C2" reg_inst="30"/> |
| 919 | <instance addr="0x270216C2" reg_inst="31"/> |
| 920 | </register> |
| 921 | <register name="LSU_HOLD_OUT_REG3"> |
| 922 | <instance addr="0x200286C3" reg_inst="0"/> |
| 923 | <instance addr="0x200246C3" reg_inst="1"/> |
| 924 | <instance addr="0x200226C3" reg_inst="2"/> |
| 925 | <instance addr="0x200216C3" reg_inst="3"/> |
| 926 | <instance addr="0x210286C3" reg_inst="4"/> |
| 927 | <instance addr="0x210246C3" reg_inst="5"/> |
| 928 | <instance addr="0x210226C3" reg_inst="6"/> |
| 929 | <instance addr="0x210216C3" reg_inst="7"/> |
| 930 | <instance addr="0x220286C3" reg_inst="8"/> |
| 931 | <instance addr="0x220246C3" reg_inst="9"/> |
| 932 | <instance addr="0x220226C3" reg_inst="10"/> |
| 933 | <instance addr="0x220216C3" reg_inst="11"/> |
| 934 | <instance addr="0x230286C3" reg_inst="12"/> |
| 935 | <instance addr="0x230246C3" reg_inst="13"/> |
| 936 | <instance addr="0x230226C3" reg_inst="14"/> |
| 937 | <instance addr="0x230216C3" reg_inst="15"/> |
| 938 | <instance addr="0x240286C3" reg_inst="16"/> |
| 939 | <instance addr="0x240246C3" reg_inst="17"/> |
| 940 | <instance addr="0x240226C3" reg_inst="18"/> |
| 941 | <instance addr="0x240216C3" reg_inst="19"/> |
| 942 | <instance addr="0x250286C3" reg_inst="20"/> |
| 943 | <instance addr="0x250246C3" reg_inst="21"/> |
| 944 | <instance addr="0x250226C3" reg_inst="22"/> |
| 945 | <instance addr="0x250216C3" reg_inst="23"/> |
| 946 | <instance addr="0x260286C3" reg_inst="24"/> |
| 947 | <instance addr="0x260246C3" reg_inst="25"/> |
| 948 | <instance addr="0x260226C3" reg_inst="26"/> |
| 949 | <instance addr="0x260216C3" reg_inst="27"/> |
| 950 | <instance addr="0x270286C3" reg_inst="28"/> |
| 951 | <instance addr="0x270246C3" reg_inst="29"/> |
| 952 | <instance addr="0x270226C3" reg_inst="30"/> |
| 953 | <instance addr="0x270216C3" reg_inst="31"/> |
| 954 | </register> |
| 955 | <register name="LSU_HOLD_OUT_REG4"> |
| 956 | <instance addr="0x200286C4" reg_inst="0"/> |
| 957 | <instance addr="0x200246C4" reg_inst="1"/> |
| 958 | <instance addr="0x200226C4" reg_inst="2"/> |
| 959 | <instance addr="0x200216C4" reg_inst="3"/> |
| 960 | <instance addr="0x210286C4" reg_inst="4"/> |
| 961 | <instance addr="0x210246C4" reg_inst="5"/> |
| 962 | <instance addr="0x210226C4" reg_inst="6"/> |
| 963 | <instance addr="0x210216C4" reg_inst="7"/> |
| 964 | <instance addr="0x220286C4" reg_inst="8"/> |
| 965 | <instance addr="0x220246C4" reg_inst="9"/> |
| 966 | <instance addr="0x220226C4" reg_inst="10"/> |
| 967 | <instance addr="0x220216C4" reg_inst="11"/> |
| 968 | <instance addr="0x230286C4" reg_inst="12"/> |
| 969 | <instance addr="0x230246C4" reg_inst="13"/> |
| 970 | <instance addr="0x230226C4" reg_inst="14"/> |
| 971 | <instance addr="0x230216C4" reg_inst="15"/> |
| 972 | <instance addr="0x240286C4" reg_inst="16"/> |
| 973 | <instance addr="0x240246C4" reg_inst="17"/> |
| 974 | <instance addr="0x240226C4" reg_inst="18"/> |
| 975 | <instance addr="0x240216C4" reg_inst="19"/> |
| 976 | <instance addr="0x250286C4" reg_inst="20"/> |
| 977 | <instance addr="0x250246C4" reg_inst="21"/> |
| 978 | <instance addr="0x250226C4" reg_inst="22"/> |
| 979 | <instance addr="0x250216C4" reg_inst="23"/> |
| 980 | <instance addr="0x260286C4" reg_inst="24"/> |
| 981 | <instance addr="0x260246C4" reg_inst="25"/> |
| 982 | <instance addr="0x260226C4" reg_inst="26"/> |
| 983 | <instance addr="0x260216C4" reg_inst="27"/> |
| 984 | <instance addr="0x270286C4" reg_inst="28"/> |
| 985 | <instance addr="0x270246C4" reg_inst="29"/> |
| 986 | <instance addr="0x270226C4" reg_inst="30"/> |
| 987 | <instance addr="0x270216C4" reg_inst="31"/> |
| 988 | </register> |
| 989 | <register name="LSU_HOLD_OUT_REG5"> |
| 990 | <instance addr="0x200286C5" reg_inst="0"/> |
| 991 | <instance addr="0x200246C5" reg_inst="1"/> |
| 992 | <instance addr="0x200226C5" reg_inst="2"/> |
| 993 | <instance addr="0x200216C5" reg_inst="3"/> |
| 994 | <instance addr="0x210286C5" reg_inst="4"/> |
| 995 | <instance addr="0x210246C5" reg_inst="5"/> |
| 996 | <instance addr="0x210226C5" reg_inst="6"/> |
| 997 | <instance addr="0x210216C5" reg_inst="7"/> |
| 998 | <instance addr="0x220286C5" reg_inst="8"/> |
| 999 | <instance addr="0x220246C5" reg_inst="9"/> |
| 1000 | <instance addr="0x220226C5" reg_inst="10"/> |
| 1001 | <instance addr="0x220216C5" reg_inst="11"/> |
| 1002 | <instance addr="0x230286C5" reg_inst="12"/> |
| 1003 | <instance addr="0x230246C5" reg_inst="13"/> |
| 1004 | <instance addr="0x230226C5" reg_inst="14"/> |
| 1005 | <instance addr="0x230216C5" reg_inst="15"/> |
| 1006 | <instance addr="0x240286C5" reg_inst="16"/> |
| 1007 | <instance addr="0x240246C5" reg_inst="17"/> |
| 1008 | <instance addr="0x240226C5" reg_inst="18"/> |
| 1009 | <instance addr="0x240216C5" reg_inst="19"/> |
| 1010 | <instance addr="0x250286C5" reg_inst="20"/> |
| 1011 | <instance addr="0x250246C5" reg_inst="21"/> |
| 1012 | <instance addr="0x250226C5" reg_inst="22"/> |
| 1013 | <instance addr="0x250216C5" reg_inst="23"/> |
| 1014 | <instance addr="0x260286C5" reg_inst="24"/> |
| 1015 | <instance addr="0x260246C5" reg_inst="25"/> |
| 1016 | <instance addr="0x260226C5" reg_inst="26"/> |
| 1017 | <instance addr="0x260216C5" reg_inst="27"/> |
| 1018 | <instance addr="0x270286C5" reg_inst="28"/> |
| 1019 | <instance addr="0x270246C5" reg_inst="29"/> |
| 1020 | <instance addr="0x270226C5" reg_inst="30"/> |
| 1021 | <instance addr="0x270216C5" reg_inst="31"/> |
| 1022 | </register> |
| 1023 | <register name="LSU_HOLD_OUT_REG6"> |
| 1024 | <instance addr="0x200286C6" reg_inst="0"/> |
| 1025 | <instance addr="0x200246C6" reg_inst="1"/> |
| 1026 | <instance addr="0x200226C6" reg_inst="2"/> |
| 1027 | <instance addr="0x200216C6" reg_inst="3"/> |
| 1028 | <instance addr="0x210286C6" reg_inst="4"/> |
| 1029 | <instance addr="0x210246C6" reg_inst="5"/> |
| 1030 | <instance addr="0x210226C6" reg_inst="6"/> |
| 1031 | <instance addr="0x210216C6" reg_inst="7"/> |
| 1032 | <instance addr="0x220286C6" reg_inst="8"/> |
| 1033 | <instance addr="0x220246C6" reg_inst="9"/> |
| 1034 | <instance addr="0x220226C6" reg_inst="10"/> |
| 1035 | <instance addr="0x220216C6" reg_inst="11"/> |
| 1036 | <instance addr="0x230286C6" reg_inst="12"/> |
| 1037 | <instance addr="0x230246C6" reg_inst="13"/> |
| 1038 | <instance addr="0x230226C6" reg_inst="14"/> |
| 1039 | <instance addr="0x230216C6" reg_inst="15"/> |
| 1040 | <instance addr="0x240286C6" reg_inst="16"/> |
| 1041 | <instance addr="0x240246C6" reg_inst="17"/> |
| 1042 | <instance addr="0x240226C6" reg_inst="18"/> |
| 1043 | <instance addr="0x240216C6" reg_inst="19"/> |
| 1044 | <instance addr="0x250286C6" reg_inst="20"/> |
| 1045 | <instance addr="0x250246C6" reg_inst="21"/> |
| 1046 | <instance addr="0x250226C6" reg_inst="22"/> |
| 1047 | <instance addr="0x250216C6" reg_inst="23"/> |
| 1048 | <instance addr="0x260286C6" reg_inst="24"/> |
| 1049 | <instance addr="0x260246C6" reg_inst="25"/> |
| 1050 | <instance addr="0x260226C6" reg_inst="26"/> |
| 1051 | <instance addr="0x260216C6" reg_inst="27"/> |
| 1052 | <instance addr="0x270286C6" reg_inst="28"/> |
| 1053 | <instance addr="0x270246C6" reg_inst="29"/> |
| 1054 | <instance addr="0x270226C6" reg_inst="30"/> |
| 1055 | <instance addr="0x270216C6" reg_inst="31"/> |
| 1056 | </register> |
| 1057 | <register name="LSU_HOLD_OUT_REG7"> |
| 1058 | <instance addr="0x200286C7" reg_inst="0"/> |
| 1059 | <instance addr="0x200246C7" reg_inst="1"/> |
| 1060 | <instance addr="0x200226C7" reg_inst="2"/> |
| 1061 | <instance addr="0x200216C7" reg_inst="3"/> |
| 1062 | <instance addr="0x210286C7" reg_inst="4"/> |
| 1063 | <instance addr="0x210246C7" reg_inst="5"/> |
| 1064 | <instance addr="0x210226C7" reg_inst="6"/> |
| 1065 | <instance addr="0x210216C7" reg_inst="7"/> |
| 1066 | <instance addr="0x220286C7" reg_inst="8"/> |
| 1067 | <instance addr="0x220246C7" reg_inst="9"/> |
| 1068 | <instance addr="0x220226C7" reg_inst="10"/> |
| 1069 | <instance addr="0x220216C7" reg_inst="11"/> |
| 1070 | <instance addr="0x230286C7" reg_inst="12"/> |
| 1071 | <instance addr="0x230246C7" reg_inst="13"/> |
| 1072 | <instance addr="0x230226C7" reg_inst="14"/> |
| 1073 | <instance addr="0x230216C7" reg_inst="15"/> |
| 1074 | <instance addr="0x240286C7" reg_inst="16"/> |
| 1075 | <instance addr="0x240246C7" reg_inst="17"/> |
| 1076 | <instance addr="0x240226C7" reg_inst="18"/> |
| 1077 | <instance addr="0x240216C7" reg_inst="19"/> |
| 1078 | <instance addr="0x250286C7" reg_inst="20"/> |
| 1079 | <instance addr="0x250246C7" reg_inst="21"/> |
| 1080 | <instance addr="0x250226C7" reg_inst="22"/> |
| 1081 | <instance addr="0x250216C7" reg_inst="23"/> |
| 1082 | <instance addr="0x260286C7" reg_inst="24"/> |
| 1083 | <instance addr="0x260246C7" reg_inst="25"/> |
| 1084 | <instance addr="0x260226C7" reg_inst="26"/> |
| 1085 | <instance addr="0x260216C7" reg_inst="27"/> |
| 1086 | <instance addr="0x270286C7" reg_inst="28"/> |
| 1087 | <instance addr="0x270246C7" reg_inst="29"/> |
| 1088 | <instance addr="0x270226C7" reg_inst="30"/> |
| 1089 | <instance addr="0x270216C7" reg_inst="31"/> |
| 1090 | </register> |
| 1091 | <register name="LSU_HOLD_OUT_REG8"> |
| 1092 | <instance addr="0x200286C8" reg_inst="0"/> |
| 1093 | <instance addr="0x200246C8" reg_inst="1"/> |
| 1094 | <instance addr="0x200226C8" reg_inst="2"/> |
| 1095 | <instance addr="0x200216C8" reg_inst="3"/> |
| 1096 | <instance addr="0x210286C8" reg_inst="4"/> |
| 1097 | <instance addr="0x210246C8" reg_inst="5"/> |
| 1098 | <instance addr="0x210226C8" reg_inst="6"/> |
| 1099 | <instance addr="0x210216C8" reg_inst="7"/> |
| 1100 | <instance addr="0x220286C8" reg_inst="8"/> |
| 1101 | <instance addr="0x220246C8" reg_inst="9"/> |
| 1102 | <instance addr="0x220226C8" reg_inst="10"/> |
| 1103 | <instance addr="0x220216C8" reg_inst="11"/> |
| 1104 | <instance addr="0x230286C8" reg_inst="12"/> |
| 1105 | <instance addr="0x230246C8" reg_inst="13"/> |
| 1106 | <instance addr="0x230226C8" reg_inst="14"/> |
| 1107 | <instance addr="0x230216C8" reg_inst="15"/> |
| 1108 | <instance addr="0x240286C8" reg_inst="16"/> |
| 1109 | <instance addr="0x240246C8" reg_inst="17"/> |
| 1110 | <instance addr="0x240226C8" reg_inst="18"/> |
| 1111 | <instance addr="0x240216C8" reg_inst="19"/> |
| 1112 | <instance addr="0x250286C8" reg_inst="20"/> |
| 1113 | <instance addr="0x250246C8" reg_inst="21"/> |
| 1114 | <instance addr="0x250226C8" reg_inst="22"/> |
| 1115 | <instance addr="0x250216C8" reg_inst="23"/> |
| 1116 | <instance addr="0x260286C8" reg_inst="24"/> |
| 1117 | <instance addr="0x260246C8" reg_inst="25"/> |
| 1118 | <instance addr="0x260226C8" reg_inst="26"/> |
| 1119 | <instance addr="0x260216C8" reg_inst="27"/> |
| 1120 | <instance addr="0x270286C8" reg_inst="28"/> |
| 1121 | <instance addr="0x270246C8" reg_inst="29"/> |
| 1122 | <instance addr="0x270226C8" reg_inst="30"/> |
| 1123 | <instance addr="0x270216C8" reg_inst="31"/> |
| 1124 | </register> |
| 1125 | <register name="LSU_HOLD_OUT_REG9"> |
| 1126 | <instance addr="0x200286C9" reg_inst="0"/> |
| 1127 | <instance addr="0x200246C9" reg_inst="1"/> |
| 1128 | <instance addr="0x200226C9" reg_inst="2"/> |
| 1129 | <instance addr="0x200216C9" reg_inst="3"/> |
| 1130 | <instance addr="0x210286C9" reg_inst="4"/> |
| 1131 | <instance addr="0x210246C9" reg_inst="5"/> |
| 1132 | <instance addr="0x210226C9" reg_inst="6"/> |
| 1133 | <instance addr="0x210216C9" reg_inst="7"/> |
| 1134 | <instance addr="0x220286C9" reg_inst="8"/> |
| 1135 | <instance addr="0x220246C9" reg_inst="9"/> |
| 1136 | <instance addr="0x220226C9" reg_inst="10"/> |
| 1137 | <instance addr="0x220216C9" reg_inst="11"/> |
| 1138 | <instance addr="0x230286C9" reg_inst="12"/> |
| 1139 | <instance addr="0x230246C9" reg_inst="13"/> |
| 1140 | <instance addr="0x230226C9" reg_inst="14"/> |
| 1141 | <instance addr="0x230216C9" reg_inst="15"/> |
| 1142 | <instance addr="0x240286C9" reg_inst="16"/> |
| 1143 | <instance addr="0x240246C9" reg_inst="17"/> |
| 1144 | <instance addr="0x240226C9" reg_inst="18"/> |
| 1145 | <instance addr="0x240216C9" reg_inst="19"/> |
| 1146 | <instance addr="0x250286C9" reg_inst="20"/> |
| 1147 | <instance addr="0x250246C9" reg_inst="21"/> |
| 1148 | <instance addr="0x250226C9" reg_inst="22"/> |
| 1149 | <instance addr="0x250216C9" reg_inst="23"/> |
| 1150 | <instance addr="0x260286C9" reg_inst="24"/> |
| 1151 | <instance addr="0x260246C9" reg_inst="25"/> |
| 1152 | <instance addr="0x260226C9" reg_inst="26"/> |
| 1153 | <instance addr="0x260216C9" reg_inst="27"/> |
| 1154 | <instance addr="0x270286C9" reg_inst="28"/> |
| 1155 | <instance addr="0x270246C9" reg_inst="29"/> |
| 1156 | <instance addr="0x270226C9" reg_inst="30"/> |
| 1157 | <instance addr="0x270216C9" reg_inst="31"/> |
| 1158 | </register> |
| 1159 | <register name="LSU_HOLD_OUT_REG10"> |
| 1160 | <instance addr="0x200286CA" reg_inst="0"/> |
| 1161 | <instance addr="0x200246CA" reg_inst="1"/> |
| 1162 | <instance addr="0x200226CA" reg_inst="2"/> |
| 1163 | <instance addr="0x200216CA" reg_inst="3"/> |
| 1164 | <instance addr="0x210286CA" reg_inst="4"/> |
| 1165 | <instance addr="0x210246CA" reg_inst="5"/> |
| 1166 | <instance addr="0x210226CA" reg_inst="6"/> |
| 1167 | <instance addr="0x210216CA" reg_inst="7"/> |
| 1168 | <instance addr="0x220286CA" reg_inst="8"/> |
| 1169 | <instance addr="0x220246CA" reg_inst="9"/> |
| 1170 | <instance addr="0x220226CA" reg_inst="10"/> |
| 1171 | <instance addr="0x220216CA" reg_inst="11"/> |
| 1172 | <instance addr="0x230286CA" reg_inst="12"/> |
| 1173 | <instance addr="0x230246CA" reg_inst="13"/> |
| 1174 | <instance addr="0x230226CA" reg_inst="14"/> |
| 1175 | <instance addr="0x230216CA" reg_inst="15"/> |
| 1176 | <instance addr="0x240286CA" reg_inst="16"/> |
| 1177 | <instance addr="0x240246CA" reg_inst="17"/> |
| 1178 | <instance addr="0x240226CA" reg_inst="18"/> |
| 1179 | <instance addr="0x240216CA" reg_inst="19"/> |
| 1180 | <instance addr="0x250286CA" reg_inst="20"/> |
| 1181 | <instance addr="0x250246CA" reg_inst="21"/> |
| 1182 | <instance addr="0x250226CA" reg_inst="22"/> |
| 1183 | <instance addr="0x250216CA" reg_inst="23"/> |
| 1184 | <instance addr="0x260286CA" reg_inst="24"/> |
| 1185 | <instance addr="0x260246CA" reg_inst="25"/> |
| 1186 | <instance addr="0x260226CA" reg_inst="26"/> |
| 1187 | <instance addr="0x260216CA" reg_inst="27"/> |
| 1188 | <instance addr="0x270286CA" reg_inst="28"/> |
| 1189 | <instance addr="0x270246CA" reg_inst="29"/> |
| 1190 | <instance addr="0x270226CA" reg_inst="30"/> |
| 1191 | <instance addr="0x270216CA" reg_inst="31"/> |
| 1192 | </register> |
| 1193 | <register name="LSU_HOLD_OUT_REG11"> |
| 1194 | <instance addr="0x200286CB" reg_inst="0"/> |
| 1195 | <instance addr="0x200246CB" reg_inst="1"/> |
| 1196 | <instance addr="0x200226CB" reg_inst="2"/> |
| 1197 | <instance addr="0x200216CB" reg_inst="3"/> |
| 1198 | <instance addr="0x210286CB" reg_inst="4"/> |
| 1199 | <instance addr="0x210246CB" reg_inst="5"/> |
| 1200 | <instance addr="0x210226CB" reg_inst="6"/> |
| 1201 | <instance addr="0x210216CB" reg_inst="7"/> |
| 1202 | <instance addr="0x220286CB" reg_inst="8"/> |
| 1203 | <instance addr="0x220246CB" reg_inst="9"/> |
| 1204 | <instance addr="0x220226CB" reg_inst="10"/> |
| 1205 | <instance addr="0x220216CB" reg_inst="11"/> |
| 1206 | <instance addr="0x230286CB" reg_inst="12"/> |
| 1207 | <instance addr="0x230246CB" reg_inst="13"/> |
| 1208 | <instance addr="0x230226CB" reg_inst="14"/> |
| 1209 | <instance addr="0x230216CB" reg_inst="15"/> |
| 1210 | <instance addr="0x240286CB" reg_inst="16"/> |
| 1211 | <instance addr="0x240246CB" reg_inst="17"/> |
| 1212 | <instance addr="0x240226CB" reg_inst="18"/> |
| 1213 | <instance addr="0x240216CB" reg_inst="19"/> |
| 1214 | <instance addr="0x250286CB" reg_inst="20"/> |
| 1215 | <instance addr="0x250246CB" reg_inst="21"/> |
| 1216 | <instance addr="0x250226CB" reg_inst="22"/> |
| 1217 | <instance addr="0x250216CB" reg_inst="23"/> |
| 1218 | <instance addr="0x260286CB" reg_inst="24"/> |
| 1219 | <instance addr="0x260246CB" reg_inst="25"/> |
| 1220 | <instance addr="0x260226CB" reg_inst="26"/> |
| 1221 | <instance addr="0x260216CB" reg_inst="27"/> |
| 1222 | <instance addr="0x270286CB" reg_inst="28"/> |
| 1223 | <instance addr="0x270246CB" reg_inst="29"/> |
| 1224 | <instance addr="0x270226CB" reg_inst="30"/> |
| 1225 | <instance addr="0x270216CB" reg_inst="31"/> |
| 1226 | </register> |
| 1227 | <register name="LSU_HOLD_OUT_REG12"> |
| 1228 | <instance addr="0x200286CC" reg_inst="0"/> |
| 1229 | <instance addr="0x200246CC" reg_inst="1"/> |
| 1230 | <instance addr="0x200226CC" reg_inst="2"/> |
| 1231 | <instance addr="0x200216CC" reg_inst="3"/> |
| 1232 | <instance addr="0x210286CC" reg_inst="4"/> |
| 1233 | <instance addr="0x210246CC" reg_inst="5"/> |
| 1234 | <instance addr="0x210226CC" reg_inst="6"/> |
| 1235 | <instance addr="0x210216CC" reg_inst="7"/> |
| 1236 | <instance addr="0x220286CC" reg_inst="8"/> |
| 1237 | <instance addr="0x220246CC" reg_inst="9"/> |
| 1238 | <instance addr="0x220226CC" reg_inst="10"/> |
| 1239 | <instance addr="0x220216CC" reg_inst="11"/> |
| 1240 | <instance addr="0x230286CC" reg_inst="12"/> |
| 1241 | <instance addr="0x230246CC" reg_inst="13"/> |
| 1242 | <instance addr="0x230226CC" reg_inst="14"/> |
| 1243 | <instance addr="0x230216CC" reg_inst="15"/> |
| 1244 | <instance addr="0x240286CC" reg_inst="16"/> |
| 1245 | <instance addr="0x240246CC" reg_inst="17"/> |
| 1246 | <instance addr="0x240226CC" reg_inst="18"/> |
| 1247 | <instance addr="0x240216CC" reg_inst="19"/> |
| 1248 | <instance addr="0x250286CC" reg_inst="20"/> |
| 1249 | <instance addr="0x250246CC" reg_inst="21"/> |
| 1250 | <instance addr="0x250226CC" reg_inst="22"/> |
| 1251 | <instance addr="0x250216CC" reg_inst="23"/> |
| 1252 | <instance addr="0x260286CC" reg_inst="24"/> |
| 1253 | <instance addr="0x260246CC" reg_inst="25"/> |
| 1254 | <instance addr="0x260226CC" reg_inst="26"/> |
| 1255 | <instance addr="0x260216CC" reg_inst="27"/> |
| 1256 | <instance addr="0x270286CC" reg_inst="28"/> |
| 1257 | <instance addr="0x270246CC" reg_inst="29"/> |
| 1258 | <instance addr="0x270226CC" reg_inst="30"/> |
| 1259 | <instance addr="0x270216CC" reg_inst="31"/> |
| 1260 | </register> |
| 1261 | <register name="LSU_HOLD_OUT_REG13"> |
| 1262 | <instance addr="0x200286CD" reg_inst="0"/> |
| 1263 | <instance addr="0x200246CD" reg_inst="1"/> |
| 1264 | <instance addr="0x200226CD" reg_inst="2"/> |
| 1265 | <instance addr="0x200216CD" reg_inst="3"/> |
| 1266 | <instance addr="0x210286CD" reg_inst="4"/> |
| 1267 | <instance addr="0x210246CD" reg_inst="5"/> |
| 1268 | <instance addr="0x210226CD" reg_inst="6"/> |
| 1269 | <instance addr="0x210216CD" reg_inst="7"/> |
| 1270 | <instance addr="0x220286CD" reg_inst="8"/> |
| 1271 | <instance addr="0x220246CD" reg_inst="9"/> |
| 1272 | <instance addr="0x220226CD" reg_inst="10"/> |
| 1273 | <instance addr="0x220216CD" reg_inst="11"/> |
| 1274 | <instance addr="0x230286CD" reg_inst="12"/> |
| 1275 | <instance addr="0x230246CD" reg_inst="13"/> |
| 1276 | <instance addr="0x230226CD" reg_inst="14"/> |
| 1277 | <instance addr="0x230216CD" reg_inst="15"/> |
| 1278 | <instance addr="0x240286CD" reg_inst="16"/> |
| 1279 | <instance addr="0x240246CD" reg_inst="17"/> |
| 1280 | <instance addr="0x240226CD" reg_inst="18"/> |
| 1281 | <instance addr="0x240216CD" reg_inst="19"/> |
| 1282 | <instance addr="0x250286CD" reg_inst="20"/> |
| 1283 | <instance addr="0x250246CD" reg_inst="21"/> |
| 1284 | <instance addr="0x250226CD" reg_inst="22"/> |
| 1285 | <instance addr="0x250216CD" reg_inst="23"/> |
| 1286 | <instance addr="0x260286CD" reg_inst="24"/> |
| 1287 | <instance addr="0x260246CD" reg_inst="25"/> |
| 1288 | <instance addr="0x260226CD" reg_inst="26"/> |
| 1289 | <instance addr="0x260216CD" reg_inst="27"/> |
| 1290 | <instance addr="0x270286CD" reg_inst="28"/> |
| 1291 | <instance addr="0x270246CD" reg_inst="29"/> |
| 1292 | <instance addr="0x270226CD" reg_inst="30"/> |
| 1293 | <instance addr="0x270216CD" reg_inst="31"/> |
| 1294 | </register> |
| 1295 | <capture_group node_inst="0:31"> |
Zane Shelley | dfe36c8 | 2022-07-27 17:10:15 -0500 | [diff] [blame] | 1296 | <capture_register reg_name="HV_PR_STATE" reg_inst= "0:31" /> |
Zane Shelley | 2e4b638 | 2021-09-24 14:22:00 -0500 | [diff] [blame] | 1297 | <capture_register reg_name="PC_FIR_HOLD_OUT" reg_inst= "0:31" /> |
| 1298 | <capture_register reg_name="THRCTL_HOLD_OUT" reg_inst= "0:31" /> |
| 1299 | <capture_register reg_name="VSU_HOLD_OUT" reg_inst= "0:31" /> |
| 1300 | <capture_register reg_name="TFAC_HOLD_OUT" reg_inst= "0:31" /> |
| 1301 | <capture_register reg_name="IFU_HOLD_OUT0" reg_inst= "0:31" /> |
| 1302 | <capture_register reg_name="IFU_HOLD_OUT1" reg_inst= "0:31" /> |
| 1303 | <capture_register reg_name="IFU_HOLD_OUT2" reg_inst= "0:31" /> |
| 1304 | <capture_register reg_name="IFU_HOLD_OUT3" reg_inst= "0:31" /> |
| 1305 | <capture_register reg_name="ISU_HOLD_OUT0" reg_inst= "0:31" /> |
| 1306 | <capture_register reg_name="ISU_HOLD_OUT1" reg_inst= "0:31" /> |
| 1307 | <capture_register reg_name="ISU_HOLD_OUT2" reg_inst= "0:31" /> |
| 1308 | <capture_register reg_name="ISU_HOLD_OUT3" reg_inst= "0:31" /> |
Zane Shelley | dfe36c8 | 2022-07-27 17:10:15 -0500 | [diff] [blame] | 1309 | <capture_register reg_name="MMU_HOLD_OUT0" reg_inst= "0:31" /> |
| 1310 | <capture_register reg_name="MMU_HOLD_OUT1" reg_inst= "0:31" /> |
| 1311 | <capture_register reg_name="MMU_HOLD_OUT2" reg_inst= "0:31" /> |
| 1312 | <capture_register reg_name="MMU_HOLD_OUT3" reg_inst= "0:31" /> |
| 1313 | <capture_register reg_name="MMU_HOLD_OUT4" reg_inst= "0:31" /> |
| 1314 | <capture_register reg_name="MMU_HOLD_OUT5" reg_inst= "0:31" /> |
Zane Shelley | 2e4b638 | 2021-09-24 14:22:00 -0500 | [diff] [blame] | 1315 | <capture_register reg_name="LSU_HOLD_OUT_REG0" reg_inst= "0:31" /> |
| 1316 | <capture_register reg_name="LSU_HOLD_OUT_REG1" reg_inst= "0:31" /> |
| 1317 | <capture_register reg_name="LSU_HOLD_OUT_REG2" reg_inst= "0:31" /> |
| 1318 | <capture_register reg_name="LSU_HOLD_OUT_REG3" reg_inst= "0:31" /> |
| 1319 | <capture_register reg_name="LSU_HOLD_OUT_REG4" reg_inst= "0:31" /> |
| 1320 | <capture_register reg_name="LSU_HOLD_OUT_REG5" reg_inst= "0:31" /> |
| 1321 | <capture_register reg_name="LSU_HOLD_OUT_REG6" reg_inst= "0:31" /> |
| 1322 | <capture_register reg_name="LSU_HOLD_OUT_REG7" reg_inst= "0:31" /> |
| 1323 | <capture_register reg_name="LSU_HOLD_OUT_REG8" reg_inst= "0:31" /> |
| 1324 | <capture_register reg_name="LSU_HOLD_OUT_REG9" reg_inst= "0:31" /> |
| 1325 | <capture_register reg_name="LSU_HOLD_OUT_REG10" reg_inst= "0:31" /> |
| 1326 | <capture_register reg_name="LSU_HOLD_OUT_REG11" reg_inst= "0:31" /> |
| 1327 | <capture_register reg_name="LSU_HOLD_OUT_REG12" reg_inst= "0:31" /> |
| 1328 | <capture_register reg_name="LSU_HOLD_OUT_REG13" reg_inst= "0:31" /> |
| 1329 | </capture_group> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1330 | <rule attn_type="CS" node_inst="0:31"> |
| 1331 | <!-- FIR & ~MASK & ~ACT0 & ~ACT1 --> |
| 1332 | <expr type="and"> |
| 1333 | <expr type="reg" value1="EQ_CORE_FIR"/> |
| 1334 | <expr type="not"> |
| 1335 | <expr type="reg" value1="EQ_CORE_FIR_MASK"/> |
| 1336 | </expr> |
| 1337 | <expr type="not"> |
| 1338 | <expr type="reg" value1="EQ_CORE_FIR_ACT0"/> |
| 1339 | </expr> |
| 1340 | <expr type="not"> |
| 1341 | <expr type="reg" value1="EQ_CORE_FIR_ACT1"/> |
| 1342 | </expr> |
| 1343 | </expr> |
| 1344 | </rule> |
| 1345 | <rule attn_type="RE" node_inst="0:31"> |
| 1346 | <!-- WOF & ~MASK & ~ACT0 & ACT1 --> |
| 1347 | <expr type="and"> |
| 1348 | <expr type="reg" value1="EQ_CORE_FIR_WOF"/> |
| 1349 | <expr type="not"> |
| 1350 | <expr type="reg" value1="EQ_CORE_FIR_MASK"/> |
| 1351 | </expr> |
| 1352 | <expr type="not"> |
| 1353 | <expr type="reg" value1="EQ_CORE_FIR_ACT0"/> |
| 1354 | </expr> |
| 1355 | <expr type="reg" value1="EQ_CORE_FIR_ACT1"/> |
| 1356 | </expr> |
| 1357 | </rule> |
| 1358 | <rule attn_type="UCS" node_inst="0:31"> |
Zane Shelley | 1252846 | 2022-05-24 18:04:35 -0500 | [diff] [blame] | 1359 | <!-- (FIR | WOF) & ~MASK & ACT0 & ACT1 --> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1360 | <expr type="and"> |
Zane Shelley | 1252846 | 2022-05-24 18:04:35 -0500 | [diff] [blame] | 1361 | <expr type="or"> |
| 1362 | <expr type="reg" value1="EQ_CORE_FIR"/> |
| 1363 | <expr type="reg" value1="EQ_CORE_FIR_WOF"/> |
| 1364 | </expr> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1365 | <expr type="not"> |
| 1366 | <expr type="reg" value1="EQ_CORE_FIR_MASK"/> |
| 1367 | </expr> |
| 1368 | <expr type="reg" value1="EQ_CORE_FIR_ACT0"/> |
| 1369 | <expr type="reg" value1="EQ_CORE_FIR_ACT1"/> |
| 1370 | </expr> |
| 1371 | </rule> |
| 1372 | <bit pos="0">IFU SRAM recoverable error (ICACHE parity error, etc)</bit> |
| 1373 | <bit pos="1">TC checkstop</bit> |
| 1374 | <bit pos="2">IFU RegFile recoverable error</bit> |
| 1375 | <bit pos="3">IFU RegFile core checkstop</bit> |
| 1376 | <bit pos="4">IFU logic recoverable error</bit> |
| 1377 | <bit pos="5">IFU logic core checkstop</bit> |
| 1378 | <bit pos="6">reserved</bit> |
| 1379 | <bit pos="7">VSU Inference Accumulator recoverable error</bit> |
| 1380 | <bit pos="8">Recovery core checkstop</bit> |
| 1381 | <bit pos="9">VSU Slice Targeted File (STF) recoverable error</bit> |
| 1382 | <bit pos="10">reserved</bit> |
| 1383 | <bit pos="11">ISU logic recoverable error</bit> |
| 1384 | <bit pos="12">ISU logic core checkstop</bit> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 1385 | <bit pos="13">reserved</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1386 | <bit pos="14">MCHK received while ME=0 - non recoverable</bit> |
| 1387 | <bit pos="15">UE from L2</bit> |
| 1388 | <bit pos="16">Number of UEs from L2 above threshold</bit> |
| 1389 | <bit pos="17">UE on CI load</bit> |
| 1390 | <bit pos="18">MMU TLB parity recoverable error</bit> |
| 1391 | <bit pos="19">MMU SLB parity recoverable error</bit> |
| 1392 | <bit pos="20">reserved</bit> |
| 1393 | <bit pos="21">MMU CXT recoverable error</bit> |
| 1394 | <bit pos="22">MMU logic core checkstop</bit> |
| 1395 | <bit pos="23">MMU system checkstop</bit> |
| 1396 | <bit pos="24">VSU logic recoverable error</bit> |
| 1397 | <bit pos="25">VSU logic core checkstop</bit> |
| 1398 | <bit pos="26">Thread in maintenance mode and receives recovery request</bit> |
| 1399 | <bit pos="27">reserved</bit> |
| 1400 | <bit pos="28">PC system checkstop - Recoverable error received when recovery disabled</bit> |
| 1401 | <bit pos="29">LSU SRAM recoverable error (DCACHE parity error, ERAT parity error, etc)</bit> |
| 1402 | <bit pos="30">LSU set deleted</bit> |
| 1403 | <bit pos="31">LSU RegFile recoverable error</bit> |
| 1404 | <bit pos="32">LSU RegFile core checkstop</bit> |
| 1405 | <bit pos="33">MMU TLB multi hit error occurred</bit> |
| 1406 | <bit pos="34">MMU SLB multi hit error occurred</bit> |
| 1407 | <bit pos="35">LSU ERAT multi hit error occurred</bit> |
| 1408 | <bit pos="36">PC forward progress error</bit> |
| 1409 | <bit pos="37">LSU logic recoverable error</bit> |
| 1410 | <bit pos="38">LSU logic core checkstop</bit> |
| 1411 | <bit pos="39">reserved</bit> |
| 1412 | <bit pos="40">reserved</bit> |
| 1413 | <bit pos="41">LSU system checkstop</bit> |
| 1414 | <bit pos="42">reserved</bit> |
| 1415 | <bit pos="43">PC thread hang recoverable error</bit> |
| 1416 | <bit pos="44">reserved</bit> |
| 1417 | <bit pos="45">PC logic checkstop</bit> |
| 1418 | <bit pos="46">PC TimeBase Facility checkstop</bit> |
| 1419 | <bit pos="47">PC TimeBase Facility checkstop</bit> |
| 1420 | <bit pos="48">reserved</bit> |
| 1421 | <bit pos="49">reserved</bit> |
| 1422 | <bit pos="50">reserved</bit> |
| 1423 | <bit pos="51">reserved</bit> |
| 1424 | <bit pos="52">Hang Recovery Failed</bit> |
| 1425 | <bit pos="53">Core Hang detected</bit> |
| 1426 | <bit pos="54">reserved</bit> |
| 1427 | <bit pos="55">Nest Hang detected</bit> |
| 1428 | <bit pos="56">Other Core Chiplet recoverable error</bit> |
| 1429 | <bit pos="57">Other Core Chiplet core checkstop</bit> |
| 1430 | <bit pos="58">Other Core Chiplet system checkstop</bit> |
| 1431 | <bit pos="59">SCOM satellite error detected</bit> |
| 1432 | <bit pos="60">Debug Trigger error inject</bit> |
| 1433 | <bit pos="61">SCOM or Firmware recoverable error inject</bit> |
| 1434 | <bit pos="62">Firmware checkstop error inject</bit> |
| 1435 | <bit pos="63">PHYP checkstop via SPRC/SPRD</bit> |
| 1436 | </attn_node> |