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Zane Shelley871adec2019-07-30 11:01:39 -05001#pragma once
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -05002
Zane Shelley52cb1a92019-08-21 14:38:31 -05003#include <hei_includes.hpp>
4#include <register/hei_register.hpp>
5#include <util/hei_bit_string.hpp>
6
Zane Shelley871adec2019-07-30 11:01:39 -05007namespace libhei
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -05008{
9
Zane Shelley61565dc2019-09-18 21:57:10 -050010/**
Zane Shelley8deb0902019-10-14 15:52:27 -050011 * @brief An abstract class containing information (e.g. address, type, length,
12 * etc.) for an actual hardware register.
Zane Shelley61565dc2019-09-18 21:57:10 -050013 *
14 * Hardware access:
15 *
16 * Actual hardware access is defined by the user application via the user
17 * interface APIs. In order to tell the user application which chip to target,
Zane Shelley53efc352019-10-03 21:46:39 -050018 * the user application will give the isolator a list of pointers to its
19 * objects. They will then be passed into the public functions of this class
20 * and eventually given back to the user application when hardware access is
21 * needed.
Zane Shelleyd0af3582019-09-19 10:48:59 -050022 *
23 * Register cache:
24 *
25 * In order to save memory space, each instance of this class does not store
26 * the contents of the target hardware register. Instead, that data is stored
Paul Greenwood6574f6e2019-09-17 09:43:22 -050027 * in a register cache, which is a static variable defined in this class. This
Zane Shelleyd0af3582019-09-19 10:48:59 -050028 * allows us to store only what we need. The cache can also be thought of as a
29 * snapshot of the registers at the time of isolation, which can be useful if
30 * the hardware is still running and register values could change.
31 *
32 * In order to ensure stale data isn't used from the cache, call
33 * HardwareRegister::flushAll() before beginning isolation on a new attention.
34 * Also, HardwareRegister::flushAll() should be called when the isolator is
35 * uninitialized before the rest of the isolation objects are deleted.
Zane Shelley61565dc2019-09-18 21:57:10 -050036 */
Zane Shelleycd36f432019-08-30 21:22:07 -050037class HardwareRegister : public Register
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050038{
39 public:
40
Zane Shelley8deb0902019-10-14 15:52:27 -050041 /** @brief Pure virtual destructor. */
42 virtual ~HardwareRegister() = 0;
43
44 protected:
45
46 /**
47 * @brief Constructor from components.
48 * @param i_chipType Type of chip associated with this register.
49 * @param i_id Unique ID for this register.
50 * @param i_instance Instance of this register
51 * @param i_accessLevel Hardware access level for this register.
52 */
Zane Shelley83da2452019-10-25 15:45:34 -050053 HardwareRegister(ChipType_t i_chipType, RegisterId_t i_id,
54 RegisterInstance_t i_instance,
55 RegisterAccessLevel_t i_accessLevel) :
Zane Shelley7f7a42d2019-10-28 13:28:31 -050056 Register(),
57 iv_chipType(i_chipType), iv_id(i_id), iv_instance(i_instance),
58 iv_accessLevel(i_accessLevel)
Zane Shelley8deb0902019-10-14 15:52:27 -050059 {}
60
61 private: // Instance variables
62
63 /** The type of chip associated with register. */
64 const ChipType_t iv_chipType;
65
66 /** The unique ID for this register. */
67 const RegisterId_t iv_id;
68
69 /** A register may have multiple instances. All of which will have the same
70 * ID. This variable is used to distinguish between each instance of the
71 * register. */
72 const RegisterInstance_t iv_instance;
73
74 /** The hardware access level of this register (read/write, read-only,
75 * write-only, etc.). */
76 const RegisterAccessLevel_t iv_accessLevel;
77
78 public: // Accessor functions
79
80 /** @return The type of chip associated with this register. */
Zane Shelley7f7a42d2019-10-28 13:28:31 -050081 ChipType_t getChipType() const
82 {
83 return iv_chipType;
84 }
Zane Shelley8deb0902019-10-14 15:52:27 -050085
86 /* @return The unique ID for this register. */
Zane Shelley7f7a42d2019-10-28 13:28:31 -050087 RegisterId_t getId() const
88 {
89 return iv_id;
90 }
Zane Shelley8deb0902019-10-14 15:52:27 -050091
92 /* @return The instance of this register. */
Zane Shelley7f7a42d2019-10-28 13:28:31 -050093 RegisterInstance_t getInstance() const
94 {
95 return iv_instance;
96 }
Zane Shelley8deb0902019-10-14 15:52:27 -050097
98 /** @return The hardware access level of this register. */
Zane Shelley7f7a42d2019-10-28 13:28:31 -050099 RegisterAccessLevel_t getAccessLevel() const
100 {
101 return iv_accessLevel;
102 }
Zane Shelley8deb0902019-10-14 15:52:27 -0500103
104 // NOTE: The following are determined by child classes.
105
106 /** @return This register's type. */
107 virtual RegisterType_t getRegisterType() const = 0;
108
109 /** @return The address of this register. */
110 virtual RegisterAddress_t getAddress() const = 0;
111
112 /** @return The size (in bytes) of this register. */
113 virtual size_t getSize() const = 0;
114
Zane Shelley75e68e92019-10-18 16:16:23 -0500115 public: // Operators
116
117 /** @brief Equals operator. */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500118 bool operator==(const HardwareRegister& i_r) const
Zane Shelley75e68e92019-10-18 16:16:23 -0500119 {
120 // Comparing register type, chip type, and address should be sufficient.
Zane Shelley83da2452019-10-25 15:45:34 -0500121 return (getRegisterType() == i_r.getRegisterType()) &&
122 (getChipType() == i_r.getChipType() ) &&
123 (getAddress() == i_r.getAddress() );
Zane Shelley75e68e92019-10-18 16:16:23 -0500124 }
125
126 /** @brief Less than operator. */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500127 bool operator<(const HardwareRegister& i_r) const
Zane Shelley75e68e92019-10-18 16:16:23 -0500128 {
129 // Comparing register type, chip type, and address should be sufficient.
Zane Shelley83da2452019-10-25 15:45:34 -0500130 if (getRegisterType() < i_r.getRegisterType())
Zane Shelley75e68e92019-10-18 16:16:23 -0500131 {
132 return true;
133 }
Zane Shelley83da2452019-10-25 15:45:34 -0500134 else if (getRegisterType() == i_r.getRegisterType())
Zane Shelley75e68e92019-10-18 16:16:23 -0500135 {
Zane Shelley83da2452019-10-25 15:45:34 -0500136 if (getChipType() < i_r.getChipType())
Zane Shelley75e68e92019-10-18 16:16:23 -0500137 {
138 return true;
139 }
Zane Shelley83da2452019-10-25 15:45:34 -0500140 else if (getChipType() == i_r.getChipType())
Zane Shelley75e68e92019-10-18 16:16:23 -0500141 {
Zane Shelley83da2452019-10-25 15:45:34 -0500142 return (getAddress() < i_r.getAddress());
Zane Shelley75e68e92019-10-18 16:16:23 -0500143 }
144 }
145
146 return false;
147 }
148
Zane Shelley8deb0902019-10-14 15:52:27 -0500149 public:
150
Zane Shelley65ed96a2019-10-14 13:06:11 -0500151 /** Function overloaded from parent Register class. */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500152 const BitString* getBitString(const Chip& i_chip) const;
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500153
Zane Shelley65ed96a2019-10-14 13:06:11 -0500154#if 0
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500155 /**
156 * @brief Updates bit string contents associated with register
157 * @param i_bs poiner to bit string
158 * @return Nil
159 */
Paul Greenwood6574f6e2019-09-17 09:43:22 -0500160 virtual void setBitString(const BitString * i_bs) ;
Zane Shelley61565dc2019-09-18 21:57:10 -0500161#endif
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500162
163 /**
Zane Shelley61565dc2019-09-18 21:57:10 -0500164 * @brief Reads a register from hardware via the user interface APIs.
Zane Shelley53efc352019-10-03 21:46:39 -0500165 * @param i_chip The target chip in which this register belongs.
Zane Shelley61565dc2019-09-18 21:57:10 -0500166 * @param i_force When false, this function will only read from hardware if
167 * an entry for this instance does not already exist in the
168 * register cache. When true, the entry in the register
169 * cache is flushed, if it exists. Then this function will
170 * read from hardware and update the cache.
171 * @return See the return code from the registerRead() user interface API.
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500172 */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500173 ReturnCode read(const Chip& i_chip, bool i_force = false) const;
Zane Shelley61565dc2019-09-18 21:57:10 -0500174
Zane Shelley83da2452019-10-25 15:45:34 -0500175#ifndef __HEI_READ_ONLY
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500176
177 /**
Zane Shelley61565dc2019-09-18 21:57:10 -0500178 * @brief Writes the value stored in the register cache to hardware via the
179 * user interface APIs.
Zane Shelley53efc352019-10-03 21:46:39 -0500180 * @param i_chip The target chip in which this register belongs.
Zane Shelley61565dc2019-09-18 21:57:10 -0500181 * @return See the return code from the registerWrite() user interface API.
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500182 */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500183 ReturnCode write(const Chip& i_chip) const;
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500184
Zane Shelley83da2452019-10-25 15:45:34 -0500185#endif // __HEI_READ_ONLY
Zane Shelley61565dc2019-09-18 21:57:10 -0500186
Zane Shelleyafa669a2019-10-15 13:23:17 -0500187 protected:
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500188
189 /**
Zane Shelleyafa669a2019-10-15 13:23:17 -0500190 * @brief Provides access to this register's BitString.
191 *
192 * WARNING: Allowing public access to this function may be dangerous. For
193 * now it should be left as protected.
194 *
Zane Shelley53efc352019-10-03 21:46:39 -0500195 * @param i_chip The target chip in which this register belongs.
Zane Shelleyafa669a2019-10-15 13:23:17 -0500196 * @return A reference to the BitString.
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500197 */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500198 BitString& accessBitString(const Chip& i_chip);
Zane Shelley61565dc2019-09-18 21:57:10 -0500199
Zane Shelley61565dc2019-09-18 21:57:10 -0500200 private: // Hardware accessor management functions.
201
Zane Shelley53efc352019-10-03 21:46:39 -0500202 /** @brief Asserts this register belongs on the target accessor chip. */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500203 void verifyAccessorChip(const Chip& i_chip) const
Zane Shelley61565dc2019-09-18 21:57:10 -0500204 {
Zane Shelley83da2452019-10-25 15:45:34 -0500205 HEI_ASSERT(getChipType() == i_chip.getType());
Zane Shelley61565dc2019-09-18 21:57:10 -0500206 }
Zane Shelleyd0af3582019-09-19 10:48:59 -0500207
208 private: // Register cache class variable
209
210 /**
211 * @brief Caches the contents of registers read from hardware.
212 *
213 * The goal is to create a snapshot of the hardware register contents as
214 * close to the reported attention as possible. This snapshot is then used
215 * for additional analysis/debug when needed.
216 */
217 class Cache
218 {
219 public:
220
221 /** @brief Default constructor. */
222 Cache() = default;
223
224 /** @brief Destructor. */
225 ~Cache() = default;
226
227 /** @brief Copy constructor. */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500228 Cache(const Cache&) = delete;
Zane Shelleyd0af3582019-09-19 10:48:59 -0500229
230 /** @brief Assignment operator. */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500231 Cache& operator=(const Cache&) = delete;
Zane Shelleyd0af3582019-09-19 10:48:59 -0500232
233 /**
234 * @brief Queries if a specific entry exists in the cache.
235 * @param i_chip The target chip.
236 * @param i_hwReg The target register.
237 * @return True if the entry exists, false otherwise.
238 */
Zane Shelley7f7a42d2019-10-28 13:28:31 -0500239 bool query(const Chip& i_chip, const HardwareRegister* i_hwReg) const;
Zane Shelleyd0af3582019-09-19 10:48:59 -0500240
241 /**
242 * @brief Returns the data buffer for the given chip and register.
243 * @param i_chip The target chip.
244 * @param i_hwReg The target register.
245 * @return A reference to the BitString containing the register data.
246 * @note If an entry does not exist in the cache, an entry will be
247 * created and the BitString will be initialized to 0.
248 */
Zane Shelley7f7a42d2019-10-28 13:28:31 -0500249 BitString& access(const Chip& i_chip, const HardwareRegister* i_hwReg);
Zane Shelleyd0af3582019-09-19 10:48:59 -0500250
251 /** @brief Flushes entire contents from cache. */
252 void flush();
253
254 /**
255 * @brief Removes a single register from the cache.
256 * @param i_chip The target chip.
257 * @param i_hwReg The target register.
258 */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500259 void flush(const Chip& i_chip, const HardwareRegister* i_hwReg);
Zane Shelleyd0af3582019-09-19 10:48:59 -0500260
261 private:
262
263 /**
264 * @brief Stores a BitStringBuffer for each HardwareRegister per Chip.
265 *
266 * The HardwareRegister keys will just be pointers to the isolation
267 * objects created in the main initialize() API. Those should exist
268 * until the main uninitialize() API is called. It is important that the
269 * cache is flushed at the beginning of the uninitialize() API before
270 * the rest of the isolation objects are deleted.
271 *
272 * The Chip keys are copies of the objects passed to the isolator
273 * because the user application is responsible for storage of the
274 * objects passed to the isolator. We don't want to chance a Chip was
275 * created as a local variable that goes out of scope, or other similar
276 * situations.
277 */
278 std::map<Chip, std::map<const HardwareRegister*, BitString*>> iv_cache;
279 };
280
281 /** This allows all HardwareRegister objects access to the cache. */
282 static Cache cv_cache;
283
284 public: // Register cache management functions.
285
286 /** @brief Flushes the entire register cache. */
Zane Shelley7f7a42d2019-10-28 13:28:31 -0500287 static void flushAll()
288 {
289 cv_cache.flush();
290 }
Zane Shelleyd0af3582019-09-19 10:48:59 -0500291
Zane Shelley53efc352019-10-03 21:46:39 -0500292 /**
293 * @brief Flushes this register from the cache.
294 * @param i_chip The target chip in which this register belongs.
295 */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500296 void flush(const Chip& i_chip) const
Zane Shelleyd0af3582019-09-19 10:48:59 -0500297 {
Zane Shelley83da2452019-10-25 15:45:34 -0500298 cv_cache.flush(i_chip, this);
Zane Shelleyd0af3582019-09-19 10:48:59 -0500299 }
300
Zane Shelley53efc352019-10-03 21:46:39 -0500301 private: // Register cache management functions.
302
303 /**
304 * @param i_chip The target chip in which this register belongs.
305 * @return True if an entry for this register exist in this cache.
306 */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500307 bool queryCache(const Chip& i_chip) const
Zane Shelleyd0af3582019-09-19 10:48:59 -0500308 {
Zane Shelley83da2452019-10-25 15:45:34 -0500309 return cv_cache.query(i_chip, this);
Zane Shelley53efc352019-10-03 21:46:39 -0500310 }
311
312 /**
313 * @param i_chip The target chip in which this register belongs.
314 * @return A reference to this register's BitString in cache.
315 */
Zane Shelleyfe27b652019-10-28 11:33:07 -0500316 BitString& accessCache(const Chip& i_chip) const
Zane Shelley53efc352019-10-03 21:46:39 -0500317 {
Zane Shelley83da2452019-10-25 15:45:34 -0500318 return cv_cache.access(i_chip, this);
Zane Shelleyd0af3582019-09-19 10:48:59 -0500319 }
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500320};
321
Zane Shelley871adec2019-07-30 11:01:39 -0500322} // end namespace libhei