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gerrit.openbmc.org / openbmc / openpower-libhei / 853765bf989a2789b4456faf8ea74b6ce0b30870 / . / xml / p10 / node_mc_omi_dl.xml
blob: 0ff22ae49ec44cfe6ace75616220aa85692e7978 [file] [log] [blame]
Zane Shelleyc928f942021-07-09 14:32:58 -0500[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2<attn_node model_ec="P10_10,P10_20" name="MC_OMI_DL" reg_type="SCOM">
3
4 <register name="MC_OMI_DL_CONFIG0">
5 <instance reg_inst= "0" addr="0x0C011410" />
6 <instance reg_inst= "1" addr="0x0C011420" />
7 <instance reg_inst= "2" addr="0x0C011810" />
8 <instance reg_inst= "3" addr="0x0C011820" />
9 <instance reg_inst= "4" addr="0x0D011410" />
10 <instance reg_inst= "5" addr="0x0D011420" />
11 <instance reg_inst= "6" addr="0x0D011810" />
12 <instance reg_inst= "7" addr="0x0D011820" />
13 <instance reg_inst= "8" addr="0x0E011410" />
14 <instance reg_inst= "9" addr="0x0E011420" />
15 <instance reg_inst="10" addr="0x0E011810" />
16 <instance reg_inst="11" addr="0x0E011820" />
17 <instance reg_inst="12" addr="0x0F011410" />
18 <instance reg_inst="13" addr="0x0F011420" />
19 <instance reg_inst="14" addr="0x0F011810" />
20 <instance reg_inst="15" addr="0x0F011820" />
21 </register>
22
23 <register name="MC_OMI_DL_CONFIG1">
24 <instance reg_inst= "0" addr="0x0C011411" />
25 <instance reg_inst= "1" addr="0x0C011421" />
26 <instance reg_inst= "2" addr="0x0C011811" />
27 <instance reg_inst= "3" addr="0x0C011821" />
28 <instance reg_inst= "4" addr="0x0D011411" />
29 <instance reg_inst= "5" addr="0x0D011421" />
30 <instance reg_inst= "6" addr="0x0D011811" />
31 <instance reg_inst= "7" addr="0x0D011821" />
32 <instance reg_inst= "8" addr="0x0E011411" />
33 <instance reg_inst= "9" addr="0x0E011421" />
34 <instance reg_inst="10" addr="0x0E011811" />
35 <instance reg_inst="11" addr="0x0E011821" />
36 <instance reg_inst="12" addr="0x0F011411" />
37 <instance reg_inst="13" addr="0x0F011421" />
38 <instance reg_inst="14" addr="0x0F011811" />
39 <instance reg_inst="15" addr="0x0F011821" />
40 </register>
41
42 <register name="MC_OMI_DL_ERR_MASK">
43 <instance reg_inst= "0" addr="0x0C011412" />
44 <instance reg_inst= "1" addr="0x0C011422" />
45 <instance reg_inst= "2" addr="0x0C011812" />
46 <instance reg_inst= "3" addr="0x0C011822" />
47 <instance reg_inst= "4" addr="0x0D011412" />
48 <instance reg_inst= "5" addr="0x0D011422" />
49 <instance reg_inst= "6" addr="0x0D011812" />
50 <instance reg_inst= "7" addr="0x0D011822" />
51 <instance reg_inst= "8" addr="0x0E011412" />
52 <instance reg_inst= "9" addr="0x0E011422" />
53 <instance reg_inst="10" addr="0x0E011812" />
54 <instance reg_inst="11" addr="0x0E011822" />
55 <instance reg_inst="12" addr="0x0F011412" />
56 <instance reg_inst="13" addr="0x0F011422" />
57 <instance reg_inst="14" addr="0x0F011812" />
58 <instance reg_inst="15" addr="0x0F011822" />
59 </register>
60
61 <register name="MC_OMI_DL_ERR_RPT">
62 <instance reg_inst= "0" addr="0x0C011413" />
63 <instance reg_inst= "1" addr="0x0C011423" />
64 <instance reg_inst= "2" addr="0x0C011813" />
65 <instance reg_inst= "3" addr="0x0C011823" />
66 <instance reg_inst= "4" addr="0x0D011413" />
67 <instance reg_inst= "5" addr="0x0D011423" />
68 <instance reg_inst= "6" addr="0x0D011813" />
69 <instance reg_inst= "7" addr="0x0D011823" />
70 <instance reg_inst= "8" addr="0x0E011413" />
71 <instance reg_inst= "9" addr="0x0E011423" />
72 <instance reg_inst="10" addr="0x0E011813" />
73 <instance reg_inst="11" addr="0x0E011823" />
74 <instance reg_inst="12" addr="0x0F011413" />
75 <instance reg_inst="13" addr="0x0F011423" />
76 <instance reg_inst="14" addr="0x0F011813" />
77 <instance reg_inst="15" addr="0x0F011823" />
78 </register>
79
80 <register name="MC_OMI_DL_ERR_CAPTURE">
81 <instance reg_inst= "0" addr="0x0C011414" />
82 <instance reg_inst= "1" addr="0x0C011424" />
83 <instance reg_inst= "2" addr="0x0C011814" />
84 <instance reg_inst= "3" addr="0x0C011824" />
85 <instance reg_inst= "4" addr="0x0D011414" />
86 <instance reg_inst= "5" addr="0x0D011424" />
87 <instance reg_inst= "6" addr="0x0D011814" />
88 <instance reg_inst= "7" addr="0x0D011824" />
89 <instance reg_inst= "8" addr="0x0E011414" />
90 <instance reg_inst= "9" addr="0x0E011424" />
91 <instance reg_inst="10" addr="0x0E011814" />
92 <instance reg_inst="11" addr="0x0E011824" />
93 <instance reg_inst="12" addr="0x0F011414" />
94 <instance reg_inst="13" addr="0x0F011424" />
95 <instance reg_inst="14" addr="0x0F011814" />
96 <instance reg_inst="15" addr="0x0F011824" />
97 </register>
98
99 <register name="MC_OMI_DL_EDPL_MAX_COUNT">
100 <instance reg_inst= "0" addr="0x0C011415" />
101 <instance reg_inst= "1" addr="0x0C011425" />
102 <instance reg_inst= "2" addr="0x0C011815" />
103 <instance reg_inst= "3" addr="0x0C011825" />
104 <instance reg_inst= "4" addr="0x0D011415" />
105 <instance reg_inst= "5" addr="0x0D011425" />
106 <instance reg_inst= "6" addr="0x0D011815" />
107 <instance reg_inst= "7" addr="0x0D011825" />
108 <instance reg_inst= "8" addr="0x0E011415" />
109 <instance reg_inst= "9" addr="0x0E011425" />
110 <instance reg_inst="10" addr="0x0E011815" />
111 <instance reg_inst="11" addr="0x0E011825" />
112 <instance reg_inst="12" addr="0x0F011415" />
113 <instance reg_inst="13" addr="0x0F011425" />
114 <instance reg_inst="14" addr="0x0F011815" />
115 <instance reg_inst="15" addr="0x0F011825" />
116 </register>
117
118 <register name="MC_OMI_DL_STATUS">
119 <instance reg_inst= "0" addr="0x0C011416" />
120 <instance reg_inst= "1" addr="0x0C011426" />
121 <instance reg_inst= "2" addr="0x0C011816" />
122 <instance reg_inst= "3" addr="0x0C011826" />
123 <instance reg_inst= "4" addr="0x0D011416" />
124 <instance reg_inst= "5" addr="0x0D011426" />
125 <instance reg_inst= "6" addr="0x0D011816" />
126 <instance reg_inst= "7" addr="0x0D011826" />
127 <instance reg_inst= "8" addr="0x0E011416" />
128 <instance reg_inst= "9" addr="0x0E011426" />
129 <instance reg_inst="10" addr="0x0E011816" />
130 <instance reg_inst="11" addr="0x0E011826" />
131 <instance reg_inst="12" addr="0x0F011416" />
132 <instance reg_inst="13" addr="0x0F011426" />
133 <instance reg_inst="14" addr="0x0F011816" />
134 <instance reg_inst="15" addr="0x0F011826" />
135 </register>
136
137 <register name="MC_OMI_DL_TRAINING_STATUS">
138 <instance reg_inst= "0" addr="0x0C011417" />
139 <instance reg_inst= "1" addr="0x0C011427" />
140 <instance reg_inst= "2" addr="0x0C011817" />
141 <instance reg_inst= "3" addr="0x0C011827" />
142 <instance reg_inst= "4" addr="0x0D011417" />
143 <instance reg_inst= "5" addr="0x0D011427" />
144 <instance reg_inst= "6" addr="0x0D011817" />
145 <instance reg_inst= "7" addr="0x0D011827" />
146 <instance reg_inst= "8" addr="0x0E011417" />
147 <instance reg_inst= "9" addr="0x0E011427" />
148 <instance reg_inst="10" addr="0x0E011817" />
149 <instance reg_inst="11" addr="0x0E011827" />
150 <instance reg_inst="12" addr="0x0F011417" />
151 <instance reg_inst="13" addr="0x0F011427" />
152 <instance reg_inst="14" addr="0x0F011817" />
153 <instance reg_inst="15" addr="0x0F011827" />
154 </register>
155
156 <register name="MC_OMI_DL_DLX_CONFIG">
157 <instance reg_inst= "0" addr="0x0C011418" />
158 <instance reg_inst= "1" addr="0x0C011428" />
159 <instance reg_inst= "2" addr="0x0C011818" />
160 <instance reg_inst= "3" addr="0x0C011828" />
161 <instance reg_inst= "4" addr="0x0D011418" />
162 <instance reg_inst= "5" addr="0x0D011428" />
163 <instance reg_inst= "6" addr="0x0D011818" />
164 <instance reg_inst= "7" addr="0x0D011828" />
165 <instance reg_inst= "8" addr="0x0E011418" />
166 <instance reg_inst= "9" addr="0x0E011428" />
167 <instance reg_inst="10" addr="0x0E011818" />
168 <instance reg_inst="11" addr="0x0E011828" />
169 <instance reg_inst="12" addr="0x0F011418" />
170 <instance reg_inst="13" addr="0x0F011428" />
171 <instance reg_inst="14" addr="0x0F011818" />
172 <instance reg_inst="15" addr="0x0F011828" />
173 </register>
174
175 <register name="MC_OMI_DL_DLX_INFO">
176 <instance reg_inst= "0" addr="0x0C011419" />
177 <instance reg_inst= "1" addr="0x0C011429" />
178 <instance reg_inst= "2" addr="0x0C011819" />
179 <instance reg_inst= "3" addr="0x0C011829" />
180 <instance reg_inst= "4" addr="0x0D011419" />
181 <instance reg_inst= "5" addr="0x0D011429" />
182 <instance reg_inst= "6" addr="0x0D011819" />
183 <instance reg_inst= "7" addr="0x0D011829" />
184 <instance reg_inst= "8" addr="0x0E011419" />
185 <instance reg_inst= "9" addr="0x0E011429" />
186 <instance reg_inst="10" addr="0x0E011819" />
187 <instance reg_inst="11" addr="0x0E011829" />
188 <instance reg_inst="12" addr="0x0F011419" />
189 <instance reg_inst="13" addr="0x0F011429" />
190 <instance reg_inst="14" addr="0x0F011819" />
191 <instance reg_inst="15" addr="0x0F011829" />
192 </register>
193
194 <register name="MC_OMI_DL_ERR_ACTION">
195 <instance reg_inst= "0" addr="0x0C01141D" />
196 <instance reg_inst= "1" addr="0x0C01142D" />
197 <instance reg_inst= "2" addr="0x0C01181D" />
198 <instance reg_inst= "3" addr="0x0C01182D" />
199 <instance reg_inst= "4" addr="0x0D01141D" />
200 <instance reg_inst= "5" addr="0x0D01142D" />
201 <instance reg_inst= "6" addr="0x0D01181D" />
202 <instance reg_inst= "7" addr="0x0D01182D" />
203 <instance reg_inst= "8" addr="0x0E01141D" />
204 <instance reg_inst= "9" addr="0x0E01142D" />
205 <instance reg_inst="10" addr="0x0E01181D" />
206 <instance reg_inst="11" addr="0x0E01182D" />
207 <instance reg_inst="12" addr="0x0F01141D" />
208 <instance reg_inst="13" addr="0x0F01142D" />
209 <instance reg_inst="14" addr="0x0F01181D" />
210 <instance reg_inst="15" addr="0x0F01182D" />
211 </register>
212
213 <register name="MC_OMI_DL_DEBUG_AID">
214 <instance reg_inst= "0" addr="0x0C01141E" />
215 <instance reg_inst= "1" addr="0x0C01142E" />
216 <instance reg_inst= "2" addr="0x0C01181E" />
217 <instance reg_inst= "3" addr="0x0C01182E" />
218 <instance reg_inst= "4" addr="0x0D01141E" />
219 <instance reg_inst= "5" addr="0x0D01142E" />
220 <instance reg_inst= "6" addr="0x0D01181E" />
221 <instance reg_inst= "7" addr="0x0D01182E" />
222 <instance reg_inst= "8" addr="0x0E01141E" />
223 <instance reg_inst= "9" addr="0x0E01142E" />
224 <instance reg_inst="10" addr="0x0E01181E" />
225 <instance reg_inst="11" addr="0x0E01182E" />
226 <instance reg_inst="12" addr="0x0F01141E" />
227 <instance reg_inst="13" addr="0x0F01142E" />
228 <instance reg_inst="14" addr="0x0F01181E" />
229 <instance reg_inst="15" addr="0x0F01182E" />
230 </register>
231
232 <register name="MC_OMI_DL_CYA_BITS">
233 <instance reg_inst= "0" addr="0x0C01141F" />
234 <instance reg_inst= "1" addr="0x0C01142F" />
235 <instance reg_inst= "2" addr="0x0C01181F" />
236 <instance reg_inst= "3" addr="0x0C01182F" />
237 <instance reg_inst= "4" addr="0x0D01141F" />
238 <instance reg_inst= "5" addr="0x0D01142F" />
239 <instance reg_inst= "6" addr="0x0D01181F" />
240 <instance reg_inst= "7" addr="0x0D01182F" />
241 <instance reg_inst= "8" addr="0x0E01141F" />
242 <instance reg_inst= "9" addr="0x0E01142F" />
243 <instance reg_inst="10" addr="0x0E01181F" />
244 <instance reg_inst="11" addr="0x0E01182F" />
245 <instance reg_inst="12" addr="0x0F01141F" />
246 <instance reg_inst="13" addr="0x0F01142F" />
247 <instance reg_inst="14" addr="0x0F01181F" />
248 <instance reg_inst="15" addr="0x0F01182F" />
249 </register>
250
251 <capture_group node_inst="0:15">
252 <capture_register reg_name="MC_OMI_DL_CONFIG0" reg_inst="0:15" />
253 <capture_register reg_name="MC_OMI_DL_CONFIG1" reg_inst="0:15" />
254 <capture_register reg_name="MC_OMI_DL_ERR_MASK" reg_inst="0:15" />
255 <capture_register reg_name="MC_OMI_DL_ERR_RPT" reg_inst="0:15" />
256 <capture_register reg_name="MC_OMI_DL_ERR_CAPTURE" reg_inst="0:15" />
257 <capture_register reg_name="MC_OMI_DL_EDPL_MAX_COUNT" reg_inst="0:15" />
258 <capture_register reg_name="MC_OMI_DL_STATUS" reg_inst="0:15" />
259 <capture_register reg_name="MC_OMI_DL_TRAINING_STATUS" reg_inst="0:15" />
260 <capture_register reg_name="MC_OMI_DL_DLX_CONFIG" reg_inst="0:15" />
261 <capture_register reg_name="MC_OMI_DL_DLX_INFO" reg_inst="0:15" />
262 <capture_register reg_name="MC_OMI_DL_ERR_ACTION" reg_inst="0:15" />
263 <capture_register reg_name="MC_OMI_DL_DEBUG_AID" reg_inst="0:15" />
264 <capture_register reg_name="MC_OMI_DL_CYA_BITS" reg_inst="0:15" />
265 </capture_group>
266
267 <rule attn_type="CS" node_inst="0,2,4,6,8,10,12,14">
268 <!-- FIR & ~MASK & ~ACT0 & ~ACT1 & 0xfffff00000000000-->
269 <expr type="and">
270 <expr type="reg" value1="MC_OMI_DL_FIR" value2="0:7"/>
271 <expr type="not">
272 <expr type="reg" value1="MC_OMI_DL_FIR_MASK" value2="0:7"/>
273 </expr>
274 <expr type="not">
275 <expr type="reg" value1="MC_OMI_DL_FIR_ACT0" value2="0:7"/>
276 </expr>
277 <expr type="not">
278 <expr type="reg" value1="MC_OMI_DL_FIR_ACT1" value2="0:7"/>
279 </expr>
280 <expr type="int" value1="0xfffff00000000000" />
281 </expr>
282 </rule>
283
284 <rule attn_type="CS" node_inst="1,3,5,7,9,11,13,15">
285 <!-- (FIR & ~MASK & ~ACT0 & ~ACT1 & 0x00000fffff000000) << 20 -->
286 <expr type="lshift" value1="20">
287 <expr type="and">
288 <expr type="reg" value1="MC_OMI_DL_FIR" value2="0:7"/>
289 <expr type="not">
290 <expr type="reg" value1="MC_OMI_DL_FIR_MASK" value2="0:7"/>
291 </expr>
292 <expr type="not">
293 <expr type="reg" value1="MC_OMI_DL_FIR_ACT0" value2="0:7"/>
294 </expr>
295 <expr type="not">
296 <expr type="reg" value1="MC_OMI_DL_FIR_ACT1" value2="0:7"/>
297 </expr>
298 <expr type="int" value1="0x00000fffff000000" />
299 </expr>
300 </expr>
301 </rule>
302
303 <rule attn_type="RE" node_inst="0,2,4,6,8,10,12,14">
304 <!-- FIR & ~MASK & ~ACT0 & ACT1 & 0xfffff00000000000-->
305 <expr type="and">
306 <expr type="reg" value1="MC_OMI_DL_FIR" value2="0:7"/>
307 <expr type="not">
308 <expr type="reg" value1="MC_OMI_DL_FIR_MASK" value2="0:7"/>
309 </expr>
310 <expr type="not">
311 <expr type="reg" value1="MC_OMI_DL_FIR_ACT0" value2="0:7"/>
312 </expr>
313 <expr type="reg" value1="MC_OMI_DL_FIR_ACT1" value2="0:7"/>
314 <expr type="int" value1="0xfffff00000000000" />
315 </expr>
316 </rule>
317
318 <rule attn_type="RE" node_inst="1,3,5,7,9,11,13,15">
319 <!-- (FIR & ~MASK & ~ACT0 & ACT1 & 0x00000fffff000000) << 20 -->
320 <expr type="lshift" value1="20">
321 <expr type="and">
322 <expr type="reg" value1="MC_OMI_DL_FIR" value2="0:7"/>
323 <expr type="not">
324 <expr type="reg" value1="MC_OMI_DL_FIR_MASK" value2="0:7"/>
325 </expr>
326 <expr type="not">
327 <expr type="reg" value1="MC_OMI_DL_FIR_ACT0" value2="0:7"/>
328 </expr>
329 <expr type="reg" value1="MC_OMI_DL_FIR_ACT1" value2="0:7"/>
330 <expr type="int" value1="0x00000fffff000000" />
331 </expr>
332 </expr>
333 </rule>
334
335 <rule attn_type="SPA" node_inst="0,2,4,6,8,10,12,14">
336 <!-- FIR & ~MASK & ACT0 & ~ACT1 & 0xfffff00000000000-->
337 <expr type="and">
338 <expr type="reg" value1="MC_OMI_DL_FIR" value2="0:7"/>
339 <expr type="not">
340 <expr type="reg" value1="MC_OMI_DL_FIR_MASK" value2="0:7"/>
341 </expr>
342 <expr type="reg" value1="MC_OMI_DL_FIR_ACT0" value2="0:7"/>
343 <expr type="not">
344 <expr type="reg" value1="MC_OMI_DL_FIR_ACT1" value2="0:7"/>
345 </expr>
346 <expr type="int" value1="0xfffff00000000000" />
347 </expr>
348 </rule>
349
350 <rule attn_type="SPA" node_inst="1,3,5,7,9,11,13,15">
351 <!-- (FIR & ~MASK & ACT0 & ~ACT1 & 0x00000fffff000000) << 20 -->
352 <expr type="lshift" value1="20">
353 <expr type="and">
354 <expr type="reg" value1="MC_OMI_DL_FIR" value2="0:7"/>
355 <expr type="not">
356 <expr type="reg" value1="MC_OMI_DL_FIR_MASK" value2="0:7"/>
357 </expr>
358 <expr type="reg" value1="MC_OMI_DL_FIR_ACT0" value2="0:7"/>
359 <expr type="not">
360 <expr type="reg" value1="MC_OMI_DL_FIR_ACT1" value2="0:7"/>
361 </expr>
362 <expr type="int" value1="0x00000fffff000000" />
363 </expr>
364 </expr>
365 </rule>
366
367 <bit pos= "0" child_node="MC_OMI_DL_ERR_RPT" node_inst="0:15">OMI-DL fatal error</bit>
368 <bit pos= "1">OMI-DL UE on data flit</bit>
369 <bit pos= "2">OMI-DL CE on TL flit</bit>
370 <bit pos= "3">OMI-DL detected a CRC error</bit>
371 <bit pos= "4">OMI-DL received a nack</bit>
372 <bit pos= "5">OMI-DL running in degraded mode</bit>
373 <bit pos= "6">OMI-DL parity error detection on a lane</bit>
374 <bit pos= "7">OMI-DL retrained due to no forward progress</bit>
375 <bit pos= "8">OMI-DL remote side initiated a retrain</bit>
376 <bit pos= "9">OMI-DL retrain due to internal error or software</bit>
377 <bit pos="10">OMI-DL threshold reached</bit>
378 <bit pos="11">OMI-DL trained</bit>
379 <bit pos="12">OMI-DL endpoint error bit 0</bit>
380 <bit pos="13">OMI-DL endpoint error bit 1</bit>
381 <bit pos="14">OMI-DL endpoint error bit 2</bit>
382 <bit pos="15">OMI-DL endpoint error bit 3</bit>
383 <bit pos="16">OMI-DL endpoint error bit 4</bit>
384 <bit pos="17">OMI-DL endpoint error bit 5</bit>
385 <bit pos="18">OMI-DL endpoint error bit 6</bit>
386 <bit pos="19">OMI-DL endpoint error bit 7</bit>
387
388</attn_node>