Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 2 | <attn_node model_ec="P10_10,P10_20" name="CFIR_MC_UCS_HA" reg_type="SCOM"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame] | 3 | <register name="CFIR_MC_UCS"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 4 | <instance addr="0x0C040003" reg_inst="0"/> |
| 5 | <instance addr="0x0D040003" reg_inst="1"/> |
| 6 | <instance addr="0x0E040003" reg_inst="2"/> |
| 7 | <instance addr="0x0F040003" reg_inst="3"/> |
| 8 | </register> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame] | 9 | <register name="CFIR_MC_UCS_MASK"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 10 | <instance addr="0x0C040043" reg_inst="0"/> |
| 11 | <instance addr="0x0D040043" reg_inst="1"/> |
| 12 | <instance addr="0x0E040043" reg_inst="2"/> |
| 13 | <instance addr="0x0F040043" reg_inst="3"/> |
| 14 | </register> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame] | 15 | <register name="CFIR_MC_HA"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 16 | <instance addr="0x0C040004" reg_inst="0"/> |
| 17 | <instance addr="0x0D040004" reg_inst="1"/> |
| 18 | <instance addr="0x0E040004" reg_inst="2"/> |
| 19 | <instance addr="0x0F040004" reg_inst="3"/> |
| 20 | </register> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame] | 21 | <register name="CFIR_MC_HA_MASK"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 22 | <instance addr="0x0C040044" reg_inst="0"/> |
| 23 | <instance addr="0x0D040044" reg_inst="1"/> |
| 24 | <instance addr="0x0E040044" reg_inst="2"/> |
| 25 | <instance addr="0x0F040044" reg_inst="3"/> |
| 26 | </register> |
| 27 | <rule attn_type="UCS" node_inst="0:3"> |
| 28 | <expr type="and"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame] | 29 | <expr type="reg" value1="CFIR_MC_UCS"/> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 30 | <expr type="not"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame] | 31 | <expr type="reg" value1="CFIR_MC_UCS_MASK"/> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 32 | </expr> |
| 33 | <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| 34 | </expr> |
| 35 | </rule> |
| 36 | <rule attn_type="HA" node_inst="0:3"> |
| 37 | <expr type="and"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame] | 38 | <expr type="reg" value1="CFIR_MC_HA"/> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 39 | <expr type="not"> |
Zane Shelley | 4aebf40 | 2021-09-22 17:34:30 -0500 | [diff] [blame] | 40 | <expr type="reg" value1="CFIR_MC_HA_MASK"/> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 41 | </expr> |
| 42 | <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/> |
| 43 | </expr> |
| 44 | </rule> |
Zane Shelley | 9411933 | 2021-09-22 15:00:43 -0500 | [diff] [blame] | 45 | <bit child_node="MC_LOCAL_FIR" node_inst="0,1,2,3" pos="4">Attention from MC_LOCAL_FIR</bit> |
| 46 | <bit child_node="MC_DSTL_FIR" node_inst="0,2,4,6" pos="5">Attention from MC_DSTL_FIR 0</bit> |
| 47 | <bit child_node="MC_USTL_FIR" node_inst="0,2,4,6" pos="6">Attention from MC_USTL_FIR 0</bit> |
| 48 | <bit child_node="MC_DSTL_FIR" node_inst="1,3,5,7" pos="7">Attention from MC_DSTL_FIR 1</bit> |
| 49 | <bit child_node="MC_USTL_FIR" node_inst="1,3,5,7" pos="8">Attention from MC_USTL_FIR 1</bit> |
| 50 | <bit child_node="MC_FIR" node_inst="0,1,2,3" pos="9">Attention from MC_FIR</bit> |
| 51 | <bit child_node="MC_MISC_FIR" node_inst="0,1,2,3" pos="10">Attention from MC_MISC_FIR</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 52 | </attn_node> |