blob: 2b7d896dd9130217e001ea1579454fc671953745 [file] [log] [blame]
Zane Shelleyb9ea93c2023-03-10 10:41:41 -06001{
2 "version": 1,
3 "model_ec": ["EXPLORER_11", "EXPLORER_20"],
4 "registers": {
5 "OCMB_LFIR": {
6 "instances": {
7 "0": "0x0804000A"
8 }
9 },
Caleb Palmer94ea8ed2024-07-25 14:26:46 -050010 "OCMB_LFIR_AND": {
11 "access": "WO",
12 "instances": {
13 "0": "0x0804000B"
14 }
15 },
16 "OCMB_LFIR_OR": {
17 "access": "WO",
18 "instances": {
19 "0": "0x0804000C"
20 }
21 },
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060022 "OCMB_LFIR_MASK": {
23 "instances": {
24 "0": "0x0804000D"
25 }
26 },
Caleb Palmer94ea8ed2024-07-25 14:26:46 -050027 "OCMB_LFIR_MASK_AND": {
28 "access": "WO",
29 "instances": {
30 "0": "0x0804000E"
31 }
32 },
33 "OCMB_LFIR_MASK_OR": {
34 "access": "WO",
35 "instances": {
36 "0": "0x0804000F"
37 }
38 },
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060039 "OCMB_LFIR_ACT0": {
40 "instances": {
41 "0": "0x08040010"
42 }
43 },
44 "OCMB_LFIR_ACT1": {
45 "instances": {
46 "0": "0x08040011"
47 }
48 },
49 "ADSP_PCBI": {
50 "instances": {
51 "0": "0x00200860",
52 "1": "0x00201860",
53 "2": "0x00202860",
54 "3": "0x00203860",
55 "4": "0x00204860",
56 "5": "0x00205860",
57 "6": "0x00206860",
58 "7": "0x00207860"
59 }
60 },
61 "CSU_PCBI": {
62 "instances": {
63 "0": "0x002000B0",
64 "1": "0x002010B0",
65 "2": "0x002020B0",
66 "3": "0x002030B0",
67 "4": "0x002040B0",
68 "5": "0x002050B0",
69 "6": "0x002060B0",
70 "7": "0x002070B0"
71 }
72 }
73 },
74 "isolation_nodes": {
75 "OCMB_LFIR": {
76 "instances": [0],
77 "rules": [
78 {
Zane Shelley925c3ed2023-04-14 13:42:22 -050079 "attn_type": ["CHIP_CS"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060080 "node_inst": [0],
81 "expr": {
82 "expr_type": "and",
83 "exprs": [
84 {
85 "expr_type": "reg",
86 "reg_name": "OCMB_LFIR"
87 },
88 {
89 "expr_type": "not",
90 "expr": {
91 "expr_type": "reg",
92 "reg_name": "OCMB_LFIR_MASK"
93 }
94 },
95 {
96 "expr_type": "not",
97 "expr": {
98 "expr_type": "reg",
99 "reg_name": "OCMB_LFIR_ACT0"
100 }
101 },
102 {
103 "expr_type": "not",
104 "expr": {
105 "expr_type": "reg",
106 "reg_name": "OCMB_LFIR_ACT1"
107 }
108 }
109 ]
110 }
111 },
112 {
Zane Shelley925c3ed2023-04-14 13:42:22 -0500113 "attn_type": ["RECOV"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600114 "node_inst": [0],
115 "expr": {
116 "expr_type": "and",
117 "exprs": [
118 {
119 "expr_type": "reg",
120 "reg_name": "OCMB_LFIR"
121 },
122 {
123 "expr_type": "not",
124 "expr": {
125 "expr_type": "reg",
126 "reg_name": "OCMB_LFIR_MASK"
127 }
128 },
129 {
130 "expr_type": "not",
131 "expr": {
132 "expr_type": "reg",
133 "reg_name": "OCMB_LFIR_ACT0"
134 }
135 },
136 {
137 "expr_type": "reg",
138 "reg_name": "OCMB_LFIR_ACT1"
139 }
140 ]
141 }
142 }
143 ],
Caleb Palmer94ea8ed2024-07-25 14:26:46 -0500144 "op_rules": {
145 "FIR_SET": {
146 "op_rule": "atomic_or",
147 "reg_name": "OCMB_LFIR_OR"
148 },
149 "FIR_CLEAR": {
150 "op_rule": "atomic_and",
151 "reg_name": "OCMB_LFIR_AND"
152 },
153 "MASK_SET": {
154 "op_rule": "atomic_or",
155 "reg_name": "OCMB_LFIR_MASK_OR"
156 },
157 "MASK_CLEAR": {
158 "op_rule": "atomic_and",
159 "reg_name": "OCMB_LFIR_MASK_AND"
160 }
161 },
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600162 "bits": {
163 "0": {
164 "desc": "CFIR access PCB error"
165 },
166 "1": {
167 "desc": "CFIR internal parity error"
168 },
169 "2": {
170 "desc": "LFIR internal parity error"
171 },
172 "3": {
173 "desc": "Debug scom satellite error"
174 },
175 "4": {
176 "desc": "PSCOM Logic: PCB Access Error"
177 },
178 "5": {
179 "desc": "PSCOM Logic: Summarized internal errors"
180 },
181 "6": {
182 "desc": "Trace Logic : Scom Satellite Error - Trace0"
183 },
184 "7": {
185 "desc": "Trace Logic : Scom Satellite Error - Trace1"
186 },
187 "8": {
188 "desc": "PIB2GIF parity error on FSM or Registers"
189 },
190 "9": {
191 "desc": "MSG access PCB error"
192 },
193 "10:18": {
194 "desc": "unused"
195 },
196 "19": {
197 "desc": "DLL IRQ"
198 },
199 "20": {
200 "desc": "Watchdog timer interrupt"
201 },
202 "21": {
203 "desc": "internal temp sensor tripped a threshold"
204 },
205 "22": {
206 "desc": "GPBC_FATAL_ERROR"
207 },
208 "23": {
209 "desc": "GPBC_NON_FATAL_ERROR"
210 },
211 "24": {
212 "desc": "early power off warning"
213 },
214 "25": {
215 "desc": "TOP fatal interrupts"
216 },
217 "26": {
218 "desc": "TOP non fatal interrupts"
219 },
220 "27:30": {
221 "desc": "Interrupt from OPSe to OCMB"
222 },
223 "31": {
224 "desc": "SerDes continuous calibration failure"
225 },
226 "32": {
227 "desc": "Firmware Assert or CPU Exception"
228 },
229 "33": {
230 "desc": "Extended error information ready"
231 },
232 "34": {
233 "desc": "Interrupt from OPSe to OCMB"
234 },
235 "35": {
236 "desc": "DDR thermal event"
237 },
238 "36": {
239 "desc": "DDR4 PHY fatal"
240 },
241 "37": {
242 "desc": "DDR4 PHY non fatal"
243 },
244 "38": {
245 "desc": "DDR4 PHY interrupt"
246 },
247 "39": {
248 "desc": "foxhound fatal lane 7"
249 },
250 "40": {
251 "desc": "foxhound fatal lane 6"
252 },
253 "41": {
254 "desc": "foxhound fatal lane 5"
255 },
256 "42": {
257 "desc": "foxhound fatal lane 4"
258 },
259 "43": {
260 "desc": "foxhound fatal lane 3"
261 },
262 "44": {
263 "desc": "foxhound fatal lane 2"
264 },
265 "45": {
266 "desc": "foxhound fatal lane 1"
267 },
268 "46": {
269 "desc": "foxhound fatal lane 0"
270 },
271 "47:54": {
272 "desc": "foxhound non fatal"
273 },
274 "55:62": {
275 "desc": "foxhound serdes interrupt"
276 },
277 "63": {
278 "desc": "GIF2PCB parity error on FSM or Registers"
279 }
280 },
281 "capture_groups": [
282 {
283 "group_name": "OCMB_LFIR",
284 "group_inst": {
285 "0": 0
286 }
287 }
288 ]
289 }
290 },
291 "capture_groups": {
292 "OCMB_LFIR": [
293 {
294 "reg_name": "ADSP_PCBI",
295 "reg_inst": {
296 "0": 0
297 }
298 },
299 {
300 "reg_name": "ADSP_PCBI",
301 "reg_inst": {
302 "0": 1
303 }
304 },
305 {
306 "reg_name": "ADSP_PCBI",
307 "reg_inst": {
308 "0": 2
309 }
310 },
311 {
312 "reg_name": "ADSP_PCBI",
313 "reg_inst": {
314 "0": 3
315 }
316 },
317 {
318 "reg_name": "ADSP_PCBI",
319 "reg_inst": {
320 "0": 4
321 }
322 },
323 {
324 "reg_name": "ADSP_PCBI",
325 "reg_inst": {
326 "0": 5
327 }
328 },
329 {
330 "reg_name": "ADSP_PCBI",
331 "reg_inst": {
332 "0": 6
333 }
334 },
335 {
336 "reg_name": "ADSP_PCBI",
337 "reg_inst": {
338 "0": 7
339 }
340 },
341 {
342 "reg_name": "CSU_PCBI",
343 "reg_inst": {
344 "0": 0
345 }
346 },
347 {
348 "reg_name": "CSU_PCBI",
349 "reg_inst": {
350 "0": 1
351 }
352 },
353 {
354 "reg_name": "CSU_PCBI",
355 "reg_inst": {
356 "0": 2
357 }
358 },
359 {
360 "reg_name": "CSU_PCBI",
361 "reg_inst": {
362 "0": 3
363 }
364 },
365 {
366 "reg_name": "CSU_PCBI",
367 "reg_inst": {
368 "0": 4
369 }
370 },
371 {
372 "reg_name": "CSU_PCBI",
373 "reg_inst": {
374 "0": 5
375 }
376 },
377 {
378 "reg_name": "CSU_PCBI",
379 "reg_inst": {
380 "0": 6
381 }
382 },
383 {
384 "reg_name": "CSU_PCBI",
385 "reg_inst": {
386 "0": 7
387 }
388 }
389 ]
390 }
391}