blob: 1abc0185c0e0b6e185207d179fb5369307c6506e [file] [log] [blame]
Zane Shelleyb9ea93c2023-03-10 10:41:41 -06001{
2 "version": 1,
3 "model_ec": ["EXPLORER_11", "EXPLORER_20"],
4 "registers": {
5 "RDFFIR": {
6 "instances": {
7 "0": "0x08011C00"
8 }
9 },
Caleb Palmer94ea8ed2024-07-25 14:26:46 -050010 "RDFFIR_AND": {
11 "access": "WO",
12 "instances": {
13 "0": "0x08011C01"
14 }
15 },
16 "RDFFIR_OR": {
17 "access": "WO",
18 "instances": {
19 "0": "0x08011C02"
20 }
21 },
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060022 "RDFFIR_MASK": {
23 "instances": {
24 "0": "0x08011C03"
25 }
26 },
Caleb Palmer94ea8ed2024-07-25 14:26:46 -050027 "RDFFIR_MASK_AND": {
28 "access": "WO",
29 "instances": {
30 "0": "0x08011C04"
31 }
32 },
33 "RDFFIR_MASK_OR": {
34 "access": "WO",
35 "instances": {
36 "0": "0x08011C05"
37 }
38 },
Zane Shelleyb9ea93c2023-03-10 10:41:41 -060039 "RDFFIR_ACT0": {
40 "instances": {
41 "0": "0x08011C06"
42 }
43 },
44 "RDFFIR_ACT1": {
45 "instances": {
46 "0": "0x08011C07"
47 }
48 },
49 "RDFFIR_WOF": {
50 "instances": {
51 "0": "0x08011C08"
52 }
53 },
54 "FARB0": {
55 "instances": {
56 "0": "0x08011415"
57 }
58 },
59 "MBSEC0": {
60 "instances": {
61 "0": "0x08011855"
62 }
63 },
64 "MBSEC1": {
65 "instances": {
66 "0": "0x08011856"
67 }
68 },
69 "MBSTR": {
70 "instances": {
71 "0": "0x08011857"
72 }
73 },
74 "MBSSYMEC": {
75 "instances": {
76 "0": "0x08011858",
77 "1": "0x08011859",
78 "2": "0x0801185A",
79 "3": "0x0801185B",
80 "4": "0x0801185C",
81 "5": "0x0801185D",
82 "6": "0x0801185E",
83 "7": "0x0801185F",
84 "8": "0x08011860"
85 }
86 },
87 "MBSMSEC": {
88 "instances": {
89 "0": "0x08011869"
90 }
91 },
92 "MBNCER": {
93 "instances": {
94 "0": "0x0801186A"
95 }
96 },
97 "MBRCER": {
98 "instances": {
99 "0": "0x0801186B"
100 }
101 },
102 "MBMPER": {
103 "instances": {
104 "0": "0x0801186C"
105 }
106 },
107 "MBUER": {
108 "instances": {
109 "0": "0x0801186D"
110 }
111 },
112 "MBAUER": {
113 "instances": {
114 "0": "0x0801186E"
115 }
116 },
117 "MC_ADDR_TRANS0": {
118 "instances": {
119 "0": "0x0801186F"
120 }
121 },
122 "MC_ADDR_TRANS1": {
123 "instances": {
124 "0": "0x08011870"
125 }
126 },
127 "MC_ADDR_TRANS2": {
128 "instances": {
129 "0": "0x08011871"
130 }
131 },
132 "MBSEVR0": {
133 "instances": {
134 "0": "0x0801187E"
135 }
136 },
137 "MCBAGRA": {
138 "instances": {
139 "0": "0x080118D6"
140 }
141 },
142 "MCBMCAT": {
143 "instances": {
144 "0": "0x080118D7"
145 }
146 },
147 "MCB_CNTL": {
148 "instances": {
149 "0": "0x080118DB"
150 }
151 },
152 "MCB_CNTLSTAT": {
153 "instances": {
154 "0": "0x080118DC"
155 }
156 },
157 "MCBCFG": {
158 "instances": {
159 "0": "0x080118E0"
160 }
161 },
162 "EXP_MSR": {
163 "instances": {
164 "0": "0x08011C0C"
165 }
166 },
167 "RDF_ERR_RPT_0": {
168 "instances": {
169 "0": "0x08011C0E"
170 }
171 },
172 "RDF_ERR_RPT_1": {
173 "instances": {
174 "0": "0x08011C0F"
175 }
176 },
177 "HW_MS": {
178 "instances": {
179 "0": "0x08011C10",
180 "1": "0x08011C11",
181 "2": "0x08011C12",
182 "3": "0x08011C13",
183 "4": "0x08011C14",
184 "5": "0x08011C15",
185 "6": "0x08011C16",
186 "7": "0x08011C17"
187 }
188 },
189 "FW_MS": {
190 "instances": {
191 "0": "0x08011C18",
192 "1": "0x08011C19",
193 "2": "0x08011C1A",
194 "3": "0x08011C1B",
195 "4": "0x08011C1C",
196 "5": "0x08011C1D",
197 "6": "0x08011C1E",
198 "7": "0x08011C1F"
199 }
200 }
201 },
202 "isolation_nodes": {
203 "RDFFIR": {
204 "instances": [0],
205 "rules": [
206 {
Zane Shelley925c3ed2023-04-14 13:42:22 -0500207 "attn_type": ["CHIP_CS"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600208 "node_inst": [0],
209 "expr": {
210 "expr_type": "and",
211 "exprs": [
212 {
213 "expr_type": "reg",
214 "reg_name": "RDFFIR"
215 },
216 {
217 "expr_type": "not",
218 "expr": {
219 "expr_type": "reg",
220 "reg_name": "RDFFIR_MASK"
221 }
222 },
223 {
224 "expr_type": "not",
225 "expr": {
226 "expr_type": "reg",
227 "reg_name": "RDFFIR_ACT0"
228 }
229 },
230 {
231 "expr_type": "not",
232 "expr": {
233 "expr_type": "reg",
234 "reg_name": "RDFFIR_ACT1"
235 }
236 }
237 ]
238 }
239 },
240 {
Zane Shelley925c3ed2023-04-14 13:42:22 -0500241 "attn_type": ["RECOV"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600242 "node_inst": [0],
243 "expr": {
244 "expr_type": "and",
245 "exprs": [
246 {
247 "expr_type": "reg",
248 "reg_name": "RDFFIR"
249 },
250 {
251 "expr_type": "not",
252 "expr": {
253 "expr_type": "reg",
254 "reg_name": "RDFFIR_MASK"
255 }
256 },
257 {
258 "expr_type": "not",
259 "expr": {
260 "expr_type": "reg",
261 "reg_name": "RDFFIR_ACT0"
262 }
263 },
264 {
265 "expr_type": "reg",
266 "reg_name": "RDFFIR_ACT1"
267 }
268 ]
269 }
270 },
271 {
Zane Shelley925c3ed2023-04-14 13:42:22 -0500272 "attn_type": ["SP_ATTN"],
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600273 "node_inst": [0],
274 "expr": {
275 "expr_type": "and",
276 "exprs": [
277 {
278 "expr_type": "reg",
279 "reg_name": "RDFFIR"
280 },
281 {
282 "expr_type": "not",
283 "expr": {
284 "expr_type": "reg",
285 "reg_name": "RDFFIR_MASK"
286 }
287 },
288 {
289 "expr_type": "reg",
290 "reg_name": "RDFFIR_ACT0"
291 },
292 {
293 "expr_type": "not",
294 "expr": {
295 "expr_type": "reg",
296 "reg_name": "RDFFIR_ACT1"
297 }
298 }
299 ]
300 }
301 }
302 ],
Caleb Palmer94ea8ed2024-07-25 14:26:46 -0500303 "op_rules": {
304 "FIR_SET": {
305 "op_rule": "atomic_or",
306 "reg_name": "RDFFIR_OR"
307 },
308 "FIR_CLEAR": {
309 "op_rule": "atomic_and",
310 "reg_name": "RDFFIR_AND"
311 },
312 "MASK_SET": {
313 "op_rule": "atomic_or",
314 "reg_name": "RDFFIR_MASK_OR"
315 },
316 "MASK_CLEAR": {
317 "op_rule": "atomic_and",
318 "reg_name": "RDFFIR_MASK_AND"
319 }
320 },
Zane Shelleyb9ea93c2023-03-10 10:41:41 -0600321 "bits": {
322 "0": {
323 "desc": "Mainline read MPE on rank 0"
324 },
325 "1": {
326 "desc": "Mainline read MPE on rank 1"
327 },
328 "2": {
329 "desc": "Mainline read MPE on rank 2"
330 },
331 "3": {
332 "desc": "Mainline read MPE on rank 3"
333 },
334 "4": {
335 "desc": "Mainline read MPE on rank 4"
336 },
337 "5": {
338 "desc": "Mainline read MPE on rank 5"
339 },
340 "6": {
341 "desc": "Mainline read MPE on rank 6"
342 },
343 "7": {
344 "desc": "Mainline read MPE on rank 7"
345 },
346 "8": {
347 "desc": "Mainline read NCE"
348 },
349 "9": {
350 "desc": "Mainline read TCE"
351 },
352 "10": {
353 "desc": "Mainline read SCE"
354 },
355 "11": {
356 "desc": "Mainline read MCE"
357 },
358 "12": {
359 "desc": "Mainline read SUE"
360 },
361 "13": {
362 "desc": "Mainline read AUE"
363 },
364 "14": {
365 "desc": "Mainline read UE"
366 },
367 "15": {
368 "desc": "Mainline read RCD"
369 },
370 "16": {
371 "desc": "Mainline read IAUE"
372 },
373 "17": {
374 "desc": "Mainline read IUE"
375 },
376 "18": {
377 "desc": "Mainline read IRCD"
378 },
379 "19": {
380 "desc": "Mainline read IMPE"
381 },
382 "20": {
383 "desc": "Maintenance MPE on rank 0"
384 },
385 "21": {
386 "desc": "Maintenance MPE on rank 1"
387 },
388 "22": {
389 "desc": "Maintenance MPE on rank 2"
390 },
391 "23": {
392 "desc": "Maintenance MPE on rank 3"
393 },
394 "24": {
395 "desc": "Maintenance MPE on rank 4"
396 },
397 "25": {
398 "desc": "Maintenance MPE on rank 5"
399 },
400 "26": {
401 "desc": "Maintenance MPE on rank 6"
402 },
403 "27": {
404 "desc": "Maintenance MPE on rank 7"
405 },
406 "28": {
407 "desc": "Maintenance NCE"
408 },
409 "29": {
410 "desc": "Maintenance TCE"
411 },
412 "30": {
413 "desc": "Maintenance SCE"
414 },
415 "31": {
416 "desc": "Maintenance MCE"
417 },
418 "32": {
419 "desc": "Maintenance SUE"
420 },
421 "33": {
422 "desc": "Maintenance AUE"
423 },
424 "34": {
425 "desc": "Maintenance UE"
426 },
427 "35": {
428 "desc": "Maintenance RCD"
429 },
430 "36": {
431 "desc": "Maintenance IAUE"
432 },
433 "37": {
434 "desc": "Maintenance IUE"
435 },
436 "38": {
437 "desc": "Maintenance IRCD"
438 },
439 "39": {
440 "desc": "Maintenance IMPE"
441 },
442 "40": {
443 "desc": "RDDATA valid error"
444 },
445 "41": {
446 "desc": "SCOM status register parity error"
447 },
448 "42": {
449 "desc": "SCOM recoverable register parity error"
450 },
451 "43": {
452 "desc": "SCOM unrecoverable register parity error"
453 },
454 "44": {
455 "desc": "ECC corrector internal parity error"
456 },
457 "45": {
458 "desc": "Rd Buff ECC CHK Cor CE DW0 Detected"
459 },
460 "46": {
461 "desc": "Rd Buff ECC CHK Cor CE DW1 Detected"
462 },
463 "47": {
464 "desc": "Rd Buff ECC CHK Cor UE DW0 Detected"
465 },
466 "48": {
467 "desc": "Rd Buff ECC CHK Cor UE DW1 Detected"
468 },
469 "49:59": {
470 "desc": "Reserved"
471 },
472 "60": {
473 "desc": "SCOM register parity error for debug/wat control"
474 },
475 "61": {
476 "desc": "Reserved"
477 },
478 "62": {
479 "desc": "Internal SCOM error"
480 },
481 "63": {
482 "desc": "Internal SCOM error copy"
483 }
484 },
485 "capture_groups": [
486 {
487 "group_name": "RDFFIR",
488 "group_inst": {
489 "0": 0
490 }
491 }
492 ]
493 }
494 },
495 "capture_groups": {
496 "RDFFIR": [
497 {
498 "reg_name": "FARB0",
499 "reg_inst": {
500 "0": 0
501 }
502 },
503 {
504 "reg_name": "MBSEC0",
505 "reg_inst": {
506 "0": 0
507 }
508 },
509 {
510 "reg_name": "MBSEC1",
511 "reg_inst": {
512 "0": 0
513 }
514 },
515 {
516 "reg_name": "MBSTR",
517 "reg_inst": {
518 "0": 0
519 }
520 },
521 {
522 "reg_name": "MBSSYMEC",
523 "reg_inst": {
524 "0": 0
525 }
526 },
527 {
528 "reg_name": "MBSSYMEC",
529 "reg_inst": {
530 "0": 1
531 }
532 },
533 {
534 "reg_name": "MBSSYMEC",
535 "reg_inst": {
536 "0": 2
537 }
538 },
539 {
540 "reg_name": "MBSSYMEC",
541 "reg_inst": {
542 "0": 3
543 }
544 },
545 {
546 "reg_name": "MBSSYMEC",
547 "reg_inst": {
548 "0": 4
549 }
550 },
551 {
552 "reg_name": "MBSSYMEC",
553 "reg_inst": {
554 "0": 5
555 }
556 },
557 {
558 "reg_name": "MBSSYMEC",
559 "reg_inst": {
560 "0": 6
561 }
562 },
563 {
564 "reg_name": "MBSSYMEC",
565 "reg_inst": {
566 "0": 7
567 }
568 },
569 {
570 "reg_name": "MBSSYMEC",
571 "reg_inst": {
572 "0": 8
573 }
574 },
575 {
576 "reg_name": "MBSMSEC",
577 "reg_inst": {
578 "0": 0
579 }
580 },
581 {
582 "reg_name": "MBNCER",
583 "reg_inst": {
584 "0": 0
585 }
586 },
587 {
588 "reg_name": "MBRCER",
589 "reg_inst": {
590 "0": 0
591 }
592 },
593 {
594 "reg_name": "MBMPER",
595 "reg_inst": {
596 "0": 0
597 }
598 },
599 {
600 "reg_name": "MBUER",
601 "reg_inst": {
602 "0": 0
603 }
604 },
605 {
606 "reg_name": "MBAUER",
607 "reg_inst": {
608 "0": 0
609 }
610 },
611 {
612 "reg_name": "MC_ADDR_TRANS0",
613 "reg_inst": {
614 "0": 0
615 }
616 },
617 {
618 "reg_name": "MC_ADDR_TRANS1",
619 "reg_inst": {
620 "0": 0
621 }
622 },
623 {
624 "reg_name": "MC_ADDR_TRANS2",
625 "reg_inst": {
626 "0": 0
627 }
628 },
629 {
630 "reg_name": "MBSEVR0",
631 "reg_inst": {
632 "0": 0
633 }
634 },
635 {
636 "reg_name": "MCBAGRA",
637 "reg_inst": {
638 "0": 0
639 }
640 },
641 {
642 "reg_name": "MCBMCAT",
643 "reg_inst": {
644 "0": 0
645 }
646 },
647 {
648 "reg_name": "MCB_CNTL",
649 "reg_inst": {
650 "0": 0
651 }
652 },
653 {
654 "reg_name": "MCB_CNTLSTAT",
655 "reg_inst": {
656 "0": 0
657 }
658 },
659 {
660 "reg_name": "MCBCFG",
661 "reg_inst": {
662 "0": 0
663 }
664 },
665 {
666 "reg_name": "EXP_MSR",
667 "reg_inst": {
668 "0": 0
669 }
670 },
671 {
672 "reg_name": "RDF_ERR_RPT_0",
673 "reg_inst": {
674 "0": 0
675 }
676 },
677 {
678 "reg_name": "RDF_ERR_RPT_1",
679 "reg_inst": {
680 "0": 0
681 }
682 },
683 {
684 "reg_name": "HW_MS",
685 "reg_inst": {
686 "0": 0
687 }
688 },
689 {
690 "reg_name": "HW_MS",
691 "reg_inst": {
692 "0": 1
693 }
694 },
695 {
696 "reg_name": "HW_MS",
697 "reg_inst": {
698 "0": 2
699 }
700 },
701 {
702 "reg_name": "HW_MS",
703 "reg_inst": {
704 "0": 3
705 }
706 },
707 {
708 "reg_name": "HW_MS",
709 "reg_inst": {
710 "0": 4
711 }
712 },
713 {
714 "reg_name": "HW_MS",
715 "reg_inst": {
716 "0": 5
717 }
718 },
719 {
720 "reg_name": "HW_MS",
721 "reg_inst": {
722 "0": 6
723 }
724 },
725 {
726 "reg_name": "HW_MS",
727 "reg_inst": {
728 "0": 7
729 }
730 },
731 {
732 "reg_name": "FW_MS",
733 "reg_inst": {
734 "0": 0
735 }
736 },
737 {
738 "reg_name": "FW_MS",
739 "reg_inst": {
740 "0": 1
741 }
742 },
743 {
744 "reg_name": "FW_MS",
745 "reg_inst": {
746 "0": 2
747 }
748 },
749 {
750 "reg_name": "FW_MS",
751 "reg_inst": {
752 "0": 3
753 }
754 },
755 {
756 "reg_name": "FW_MS",
757 "reg_inst": {
758 "0": 4
759 }
760 },
761 {
762 "reg_name": "FW_MS",
763 "reg_inst": {
764 "0": 5
765 }
766 },
767 {
768 "reg_name": "FW_MS",
769 "reg_inst": {
770 "0": 6
771 }
772 },
773 {
774 "reg_name": "FW_MS",
775 "reg_inst": {
776 "0": 7
777 }
778 }
779 ]
780 }
781}