blob: 3934db8c67420ef0863de5d22e2bec0c2827f97c [file] [log] [blame]
Zane Shelleyabc51c22020-11-09 21:35:35 -06001<?xml version="1.0" encoding="UTF-8"?>
2<attn_node model_ec="P10_10" name="CFIR_MC_UCS_HA" reg_type="SCOM">
3 <register name="CFIR_MC_LOCAL_XSTOP">
4 <instance addr="0x0C040003" reg_inst="0"/>
5 <instance addr="0x0D040003" reg_inst="1"/>
6 <instance addr="0x0E040003" reg_inst="2"/>
7 <instance addr="0x0F040003" reg_inst="3"/>
8 </register>
9 <register name="CFIR_MC_LOCAL_XSTOP_MASK">
10 <instance addr="0x0C040043" reg_inst="0"/>
11 <instance addr="0x0D040043" reg_inst="1"/>
12 <instance addr="0x0E040043" reg_inst="2"/>
13 <instance addr="0x0F040043" reg_inst="3"/>
14 </register>
15 <register name="CFIR_MC_HOSTATTN">
16 <instance addr="0x0C040004" reg_inst="0"/>
17 <instance addr="0x0D040004" reg_inst="1"/>
18 <instance addr="0x0E040004" reg_inst="2"/>
19 <instance addr="0x0F040004" reg_inst="3"/>
20 </register>
21 <register name="CFIR_MC_HOSTATTN_MASK">
22 <instance addr="0x0C040044" reg_inst="0"/>
23 <instance addr="0x0D040044" reg_inst="1"/>
24 <instance addr="0x0E040044" reg_inst="2"/>
25 <instance addr="0x0F040044" reg_inst="3"/>
26 </register>
27 <rule attn_type="UCS" node_inst="0:3">
28 <expr type="and">
29 <expr type="reg" value1="CFIR_MC_LOCAL_XSTOP"/>
30 <expr type="not">
31 <expr type="reg" value1="CFIR_MC_LOCAL_XSTOP_MASK"/>
32 </expr>
33 <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
34 </expr>
35 </rule>
36 <rule attn_type="HA" node_inst="0:3">
37 <expr type="and">
38 <expr type="reg" value1="CFIR_MC_HOSTATTN"/>
39 <expr type="not">
40 <expr type="reg" value1="CFIR_MC_HOSTATTN_MASK"/>
41 </expr>
42 <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
43 </expr>
44 </rule>
45 <bit child_node="MC_LOCAL_FIR" node_inst="0,1,2,3" pos="4">Local FIR</bit>
46 <bit child_node="MC_DSTL_FIR" node_inst="0,2,4,6" pos="5">MC Fault Isolation Register (DSTLFIR)</bit>
47 <bit child_node="MC_USTL_FIR" node_inst="0,2,4,6" pos="6">MC Fault Isolation Register (USTLFIR)</bit>
48 <bit child_node="MC_DSTL_FIR" node_inst="1,3,5,7" pos="7">MC Fault Isolation Register (DSTLFIR)</bit>
49 <bit child_node="MC_USTL_FIR" node_inst="1,3,5,7" pos="8">MC Fault Isolation Register (USTLFIR)</bit>
50 <bit child_node="MC_FIR" node_inst="0,1,2,3" pos="9">MC Fault Isolation Register (MCFIR)</bit>
51 <bit child_node="MC_MISC_FIR" node_inst="0,1,2,3" pos="10">MISC Fault Isolation Register</bit>
52</attn_node>