Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 2 | <attn_node model_ec="P10_20" name="EQ_NCU_FIR" reg_type="SCOM"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 3 | <local_fir config="" name="EQ_NCU_FIR"> |
| 4 | <instance addr="0x20018640" reg_inst="0"/> |
| 5 | <instance addr="0x20014640" reg_inst="1"/> |
| 6 | <instance addr="0x20012640" reg_inst="2"/> |
| 7 | <instance addr="0x20011640" reg_inst="3"/> |
| 8 | <instance addr="0x21018640" reg_inst="4"/> |
| 9 | <instance addr="0x21014640" reg_inst="5"/> |
| 10 | <instance addr="0x21012640" reg_inst="6"/> |
| 11 | <instance addr="0x21011640" reg_inst="7"/> |
| 12 | <instance addr="0x22018640" reg_inst="8"/> |
| 13 | <instance addr="0x22014640" reg_inst="9"/> |
| 14 | <instance addr="0x22012640" reg_inst="10"/> |
| 15 | <instance addr="0x22011640" reg_inst="11"/> |
| 16 | <instance addr="0x23018640" reg_inst="12"/> |
| 17 | <instance addr="0x23014640" reg_inst="13"/> |
| 18 | <instance addr="0x23012640" reg_inst="14"/> |
| 19 | <instance addr="0x23011640" reg_inst="15"/> |
| 20 | <instance addr="0x24018640" reg_inst="16"/> |
| 21 | <instance addr="0x24014640" reg_inst="17"/> |
| 22 | <instance addr="0x24012640" reg_inst="18"/> |
| 23 | <instance addr="0x24011640" reg_inst="19"/> |
| 24 | <instance addr="0x25018640" reg_inst="20"/> |
| 25 | <instance addr="0x25014640" reg_inst="21"/> |
| 26 | <instance addr="0x25012640" reg_inst="22"/> |
| 27 | <instance addr="0x25011640" reg_inst="23"/> |
| 28 | <instance addr="0x26018640" reg_inst="24"/> |
| 29 | <instance addr="0x26014640" reg_inst="25"/> |
| 30 | <instance addr="0x26012640" reg_inst="26"/> |
| 31 | <instance addr="0x26011640" reg_inst="27"/> |
| 32 | <instance addr="0x27018640" reg_inst="28"/> |
| 33 | <instance addr="0x27014640" reg_inst="29"/> |
| 34 | <instance addr="0x27012640" reg_inst="30"/> |
| 35 | <instance addr="0x27011640" reg_inst="31"/> |
| 36 | <action attn_type="CS" config="00"/> |
| 37 | <action attn_type="RE" config="01"/> |
| 38 | </local_fir> |
| 39 | <bit pos="0">H/W control error.</bit> |
| 40 | <bit pos="1">TLBIE control error.</bit> |
| 41 | <bit pos="2">TLBIE or SLBIEG received illegal fields from core.</bit> |
| 42 | <bit pos="3">Store address machine received addr_err cresp.</bit> |
| 43 | <bit pos="4">Load address machine received addr_err cresp.</bit> |
| 44 | <bit pos="5">Topology table error - tried accessing invalid entry</bit> |
| 45 | <bit pos="6">One the NCU machines triggerd PB into early hang recovery</bit> |
| 46 | <bit pos="7">MSGSND received addr_err</bit> |
| 47 | <bit pos="8">Store data parity error from regfile detected.</bit> |
| 48 | <bit pos="9">Store timed out on PB.</bit> |
| 49 | <bit pos="10">TLBIE master timed out on PB.</bit> |
| 50 | <bit pos="11">TLBIE snooper timed out waiting for core.</bit> |
| 51 | <bit pos="12">IMA received addr_err cresp.</bit> |
| 52 | <bit pos="13">TLBIE/sync machine received addr_err cresp.</bit> |
| 53 | <bit pos="14">PMISC received address error cresp.</bit> |
| 54 | <bit pos="15">cHTM logic recieve an HTM/IMA packet that it wasn't setup for</bit> |
| 55 | <bit pos="16">Spare fir bits.</bit> |
| 56 | <bit pos="17">Spare fir bits.</bit> |
| 57 | <bit pos="18">Spare fir bits.</bit> |
| 58 | <bit pos="19">PPE write received ack_dead</bit> |
| 59 | <bit pos="20">Darn ttype while darn not enabled.</bit> |
| 60 | <bit pos="21">Darn Address Error cresp.</bit> |
| 61 | <bit pos="22">Spare fir bits.</bit> |
| 62 | <bit pos="23">Spare fir bits.</bit> |
| 63 | <bit pos="24">Spare fir bits.</bit> |
| 64 | <bit pos="25">Spare fir bits.</bit> |
| 65 | <bit pos="26">Spare fir bits.</bit> |
| 66 | <bit pos="27">Spare fir bits.</bit> |
| 67 | <bit pos="28">Spare fir bits.</bit> |
| 68 | </attn_node> |