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Matt Spinlerf716f322017-02-28 09:37:38 -06001/**
2 * Copyright © 2017 IBM Corporation
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Matt Spinler6419b632017-02-28 10:10:50 -060016#include <phosphor-logging/log.hpp>
17#include "cfam_access.hpp"
18#include "p9_cfam.hpp"
Matt Spinlerd9bdcf72017-03-09 15:06:23 -060019#include "registration.hpp"
Matt Spinler6419b632017-02-28 10:10:50 -060020#include "targeting.hpp"
21
Matt Spinlerf716f322017-02-28 09:37:38 -060022namespace openpower
23{
24namespace p9
25{
26
Matt Spinler6419b632017-02-28 10:10:50 -060027using namespace phosphor::logging;
28using namespace openpower::cfam::access;
29using namespace openpower::cfam::p9;
30using namespace openpower::targeting;
31
Matt Spinlerf716f322017-02-28 09:37:38 -060032
Matt Spinler83e37322017-03-09 11:23:17 -060033/**
34 * @brief Performs the 'VCS Workaround' on all P9s in the system.
35 * @return void
36 */
Matt Spinlerf716f322017-02-28 09:37:38 -060037void vcsWorkaround()
38{
Matt Spinler6419b632017-02-28 10:10:50 -060039 Targeting targets;
40 const auto& master = *(targets.begin());
Matt Spinlerf716f322017-02-28 09:37:38 -060041
Matt Spinler6419b632017-02-28 10:10:50 -060042 log<level::INFO>("Running P9 procedure vcsWorkaround",
43 entry("NUM_PROCS=%d", targets.size()));
44
45 //Set asynchronous clock mode
46 writeReg(master, P9_LL_MODE_REG, 0x00000001);
47
48 for (const auto& t : targets)
49 {
50 //Unfence PLL controls
51 writeRegWithMask(t, P9_ROOT_CTRL0,
52 0x00000000, 0x00010000);
53
54 //Assert Perv chiplet endpoint reset
55 writeRegWithMask(t, P9_PERV_CTRL0,
56 0x40000000, 0x40000000);
57
58 //Enable Nest PLL
59 writeRegWithMask(t, P9_PERV_CTRL0,
60 0x00000001, 0x00000001);
61 }
Matt Spinlerf716f322017-02-28 09:37:38 -060062}
63
Matt Spinlerd9bdcf72017-03-09 15:06:23 -060064REGISTER_PROCEDURE("vcsWorkaround", vcsWorkaround);
65
Matt Spinlerf716f322017-02-28 09:37:38 -060066}
67}