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Vishwanatha Subbanna41490f22020-10-14 05:04:37 -05001description: >
Patrick Williamsa1347412022-12-06 10:56:22 -06002 This defines a PCIe slot to be exposed for system management. It includes
3 the slot properties.
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -05004
5properties:
6 - name: Generation
7 type: enum[self.Generations]
Patrick Williams8da396c2022-03-14 14:21:02 -05008 default: "Unknown"
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -05009 description: >
10 The PCIe generation of the slot
11
12 - name: Lanes
13 type: size
14 description: >
15 The maximum number of PCIe lanes supported by the slot
16
17 - name: SlotType
18 type: enum[self.SlotTypes]
Patrick Williams8da396c2022-03-14 14:21:02 -050019 default: "Unknown"
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050020 description: >
21 The type of the slot
22
23 - name: HotPluggable
24 type: boolean
25 description: >
26 Whether this PCIe slot supports hotplug
27
28enumerations:
29 - name: Generations
30 description: >
31 Possible PCIe generations
32 values:
Patrick Williams8da396c2022-03-14 14:21:02 -050033 - name: "Gen1"
34 description: >
35 PCIe v1.0 slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050036
Patrick Williams8da396c2022-03-14 14:21:02 -050037 - name: "Gen2"
38 description: >
39 PCIe v2.0 slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050040
Patrick Williams8da396c2022-03-14 14:21:02 -050041 - name: "Gen3"
42 description: >
43 PCIe v3.0 slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050044
Patrick Williams8da396c2022-03-14 14:21:02 -050045 - name: "Gen4"
46 description: >
47 PCIe v4.0 slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050048
Patrick Williams8da396c2022-03-14 14:21:02 -050049 - name: "Gen5"
50 description: >
51 PCIe v5.0 slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050052
Patrick Williams8da396c2022-03-14 14:21:02 -050053 - name: "Unknown"
54 description: >
55 Version of the PCIe slot is unknown
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050056
57 - name: SlotTypes
58 description: >
59 Possible types of a PCIe slot
60 values:
Patrick Williams8da396c2022-03-14 14:21:02 -050061 - name: "FullLength"
62 description: >
63 Full-Length PCIe slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050064
Patrick Williams8da396c2022-03-14 14:21:02 -050065 - name: "HalfLength"
66 description: >
67 Half-Length PCIe slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050068
Patrick Williams8da396c2022-03-14 14:21:02 -050069 - name: "LowProfile"
70 description: >
71 Low-Profile or Slim PCIe slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050072
Patrick Williams8da396c2022-03-14 14:21:02 -050073 - name: "Mini"
74 description: >
75 Mini PCIe slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050076
Patrick Williams8da396c2022-03-14 14:21:02 -050077 - name: "M_2"
78 description: >
79 PCIe M.2 slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050080
Patrick Williams8da396c2022-03-14 14:21:02 -050081 - name: "OEM"
82 description: >
83 An OEM-specific PCIe slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050084
Patrick Williams8da396c2022-03-14 14:21:02 -050085 - name: "OCP3Small"
86 description: >
87 Open Compute Project 3.0 small form factor PCIe slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050088
Patrick Williams8da396c2022-03-14 14:21:02 -050089 - name: "OCP3Large"
90 description: >
91 Open Compute Project 3.0 large form factor PCIe slot
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050092
Patrick Williams8da396c2022-03-14 14:21:02 -050093 - name: "U_2"
94 description: >
95 U.2 / SFF-8639 PCIe slot or bay
Vishwanatha Subbanna41490f22020-10-14 05:04:37 -050096
Patrick Williams8da396c2022-03-14 14:21:02 -050097 - name: "Unknown"
98 description: >
99 Type of the PCIe slot is unknown
Brad Bishopdf557042021-10-04 15:51:11 -0400100
101associations:
102 - name: upstream_processor
103 description: >
104 Objects that implement PCIeSlot can optionally implement the
105 upstream_processor association to provide a link back to a PCIe host
106 bridge or on-processor PCIe root complexes.
Zhenwei Chen453957c2022-03-31 17:54:17 -0700107 reverse_names:
108 - associated_pcie_slots
Brad Bishopdf557042021-10-04 15:51:11 -0400109 required_endpoint_interfaces:
Patrick Williams8da396c2022-03-14 14:21:02 -0500110 - xyz.openbmc_project.Inventory.Item.Cpu