Shawn McCarney | 726e1ca | 2024-06-21 14:58:37 -0500 | [diff] [blame^] | 1 | { |
| 2 | "rails": [ |
| 3 | { |
| 4 | "name": "12.0V", |
| 5 | "page": 0, |
| 6 | "is_power_supply_rail": true, |
| 7 | "check_status_vout": true, |
| 8 | "compare_voltage_to_limit": true |
| 9 | }, |
| 10 | { |
| 11 | "name": "3V3IO", |
| 12 | "page": 1, |
| 13 | "check_status_vout": true, |
| 14 | "compare_voltage_to_limit": true |
| 15 | }, |
| 16 | { |
| 17 | "name": "CP03_AVDD", |
| 18 | "page": 18, |
| 19 | "check_status_vout": true, |
| 20 | "compare_voltage_to_limit": true |
| 21 | }, |
| 22 | { |
| 23 | "name": "CP12_AVDD", |
| 24 | "page": 19, |
| 25 | "check_status_vout": true, |
| 26 | "compare_voltage_to_limit": true |
| 27 | }, |
| 28 | { |
| 29 | "name": "CP0_VDN", |
| 30 | "page": 20, |
| 31 | "gpio": { "line": 72 } |
| 32 | }, |
| 33 | { |
| 34 | "name": "CP1_VDN", |
| 35 | "page": 21, |
| 36 | "gpio": { "line": 73 } |
| 37 | }, |
| 38 | { |
| 39 | "name": "CP2_VDN", |
| 40 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0", |
| 41 | "page": 22, |
| 42 | "gpio": { "line": 74 } |
| 43 | }, |
| 44 | { |
| 45 | "name": "CP3_VDN", |
| 46 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0", |
| 47 | "page": 23, |
| 48 | "gpio": { "line": 75 } |
| 49 | }, |
| 50 | { |
| 51 | "name": "CP0_VDD0", |
| 52 | "page": 2, |
| 53 | "check_status_vout": true, |
| 54 | "compare_voltage_to_limit": true |
| 55 | }, |
| 56 | { |
| 57 | "name": "CP1_VDD0", |
| 58 | "page": 4, |
| 59 | "check_status_vout": true, |
| 60 | "compare_voltage_to_limit": true |
| 61 | }, |
| 62 | { |
| 63 | "name": "CP2_VDD0", |
| 64 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0", |
| 65 | "page": 6, |
| 66 | "check_status_vout": true, |
| 67 | "compare_voltage_to_limit": true |
| 68 | }, |
| 69 | { |
| 70 | "name": "CP3_VDD0", |
| 71 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0", |
| 72 | "page": 8, |
| 73 | "check_status_vout": true, |
| 74 | "compare_voltage_to_limit": true |
| 75 | }, |
| 76 | { |
| 77 | "name": "CP0_VDD1", |
| 78 | "page": 3, |
| 79 | "check_status_vout": true, |
| 80 | "compare_voltage_to_limit": true |
| 81 | }, |
| 82 | { |
| 83 | "name": "CP1_VDD1", |
| 84 | "page": 5, |
| 85 | "check_status_vout": true, |
| 86 | "compare_voltage_to_limit": true |
| 87 | }, |
| 88 | { |
| 89 | "name": "CP2_VDD1", |
| 90 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0", |
| 91 | "page": 7, |
| 92 | "check_status_vout": true, |
| 93 | "compare_voltage_to_limit": true |
| 94 | }, |
| 95 | { |
| 96 | "name": "CP3_VDD1", |
| 97 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0", |
| 98 | "page": 9, |
| 99 | "check_status_vout": true, |
| 100 | "compare_voltage_to_limit": true |
| 101 | }, |
| 102 | { |
| 103 | "name": "CP0_VCS0", |
| 104 | "page": 10, |
| 105 | "check_status_vout": true, |
| 106 | "compare_voltage_to_limit": true |
| 107 | }, |
| 108 | { |
| 109 | "name": "CP1_VCS0", |
| 110 | "page": 12, |
| 111 | "check_status_vout": true, |
| 112 | "compare_voltage_to_limit": true |
| 113 | }, |
| 114 | { |
| 115 | "name": "CP2_VCS0", |
| 116 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0", |
| 117 | "page": 14, |
| 118 | "check_status_vout": true, |
| 119 | "compare_voltage_to_limit": true |
| 120 | }, |
| 121 | { |
| 122 | "name": "CP3_VCS0", |
| 123 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0", |
| 124 | "page": 16, |
| 125 | "check_status_vout": true, |
| 126 | "compare_voltage_to_limit": true |
| 127 | }, |
| 128 | { |
| 129 | "name": "CP0_VCS1", |
| 130 | "page": 11, |
| 131 | "check_status_vout": true, |
| 132 | "compare_voltage_to_limit": true |
| 133 | }, |
| 134 | { |
| 135 | "name": "CP1_VCS1", |
| 136 | "page": 13, |
| 137 | "check_status_vout": true, |
| 138 | "compare_voltage_to_limit": true |
| 139 | }, |
| 140 | { |
| 141 | "name": "CP2_VCS1", |
| 142 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0", |
| 143 | "page": 15, |
| 144 | "check_status_vout": true, |
| 145 | "compare_voltage_to_limit": true |
| 146 | }, |
| 147 | { |
| 148 | "name": "CP3_VCS1", |
| 149 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0", |
| 150 | "page": 17, |
| 151 | "check_status_vout": true, |
| 152 | "compare_voltage_to_limit": true |
| 153 | }, |
| 154 | { |
| 155 | "name": "CP0_VIO", |
| 156 | "page": 24, |
| 157 | "gpio": { "line": 76 } |
| 158 | }, |
| 159 | { |
| 160 | "name": "CP1_VIO", |
| 161 | "page": 25, |
| 162 | "gpio": { "line": 77 } |
| 163 | }, |
| 164 | { |
| 165 | "name": "CP2_VIO", |
| 166 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0", |
| 167 | "page": 26, |
| 168 | "gpio": { "line": 78 } |
| 169 | }, |
| 170 | { |
| 171 | "name": "CP3_VIO", |
| 172 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0", |
| 173 | "page": 27, |
| 174 | "gpio": { "line": 79 } |
| 175 | }, |
| 176 | { |
| 177 | "name": "CP0_VPCIE", |
| 178 | "page": 28, |
| 179 | "gpio": { "line": 59 } |
| 180 | }, |
| 181 | { |
| 182 | "name": "CP1_VPCIE", |
| 183 | "page": 29, |
| 184 | "gpio": { "line": 60 } |
| 185 | }, |
| 186 | { |
| 187 | "name": "CP2_VPCIE", |
| 188 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0", |
| 189 | "page": 30, |
| 190 | "gpio": { "line": 61 } |
| 191 | }, |
| 192 | { |
| 193 | "name": "CP3_VPCIE", |
| 194 | "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0", |
| 195 | "page": 31, |
| 196 | "gpio": { "line": 62 } |
| 197 | } |
| 198 | ] |
| 199 | } |