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Cheng C Yang8c3fab62019-12-19 00:51:06 +08001/*
2// Copyright (c) 2018 Intel Corporation
3//
4// Licensed under the Apache License, Version 2.0 (the "License");
5// you may not use this file except in compliance with the License.
6// You may obtain a copy of the License at
7//
8// http://www.apache.org/licenses/LICENSE-2.0
9//
10// Unless required by applicable law or agreed to in writing, software
11// distributed under the License is distributed on an "AS IS" BASIS,
12// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13// See the License for the specific language governing permissions and
14// limitations under the License.
15*/
16
17#pragma once
Zhikui Ren18a5ab92020-09-01 21:35:20 -070018#include "smbios_mdrv2.hpp"
Cheng C Yang8c3fab62019-12-19 00:51:06 +080019
Jie Yange7cf3192021-08-20 11:21:43 -070020#include <xyz/openbmc_project/Association/Definitions/server.hpp>
Jie Yang41654fc2021-09-07 20:26:32 -070021#include <xyz/openbmc_project/Inventory/Connector/Slot/server.hpp>
Cheng C Yang8c3fab62019-12-19 00:51:06 +080022#include <xyz/openbmc_project/Inventory/Decorator/Asset/server.hpp>
Jie Yang31720392021-07-22 21:45:45 -070023#include <xyz/openbmc_project/Inventory/Decorator/LocationCode/server.hpp>
Cheng C Yang8c3fab62019-12-19 00:51:06 +080024#include <xyz/openbmc_project/Inventory/Item/Dimm/server.hpp>
Joshi-Mansi33c948a2021-03-20 00:58:50 +053025#include <xyz/openbmc_project/Inventory/Item/server.hpp>
Tim Leedc469c72021-07-20 10:55:58 +080026#include <xyz/openbmc_project/State/Decorator/OperationalStatus/server.hpp>
Cheng C Yang8c3fab62019-12-19 00:51:06 +080027
28namespace phosphor
29{
30
31namespace smbios
32{
33
34using DeviceType =
35 sdbusplus::xyz::openbmc_project::Inventory::Item::server::Dimm::DeviceType;
36
kasunath2eca4fe2022-08-17 17:30:07 -070037using EccType =
38 sdbusplus::xyz::openbmc_project::Inventory::Item::server::Dimm::Ecc;
39
Zhikui Ren18a5ab92020-09-01 21:35:20 -070040class Dimm :
Patrick Williams77b9c472022-07-22 19:26:57 -050041 sdbusplus::server::object_t<
Zhikui Ren18a5ab92020-09-01 21:35:20 -070042 sdbusplus::xyz::openbmc_project::Inventory::Item::server::Dimm>,
Patrick Williams77b9c472022-07-22 19:26:57 -050043 sdbusplus::server::object_t<
Joshi-Mansi33c948a2021-03-20 00:58:50 +053044 sdbusplus::xyz::openbmc_project::Inventory::Decorator::server::Asset>,
Patrick Williams77b9c472022-07-22 19:26:57 -050045 sdbusplus::server::object_t<sdbusplus::xyz::openbmc_project::Inventory::
46 Decorator::server::LocationCode>,
47 sdbusplus::server::object_t<
Jie Yang41654fc2021-09-07 20:26:32 -070048 sdbusplus::xyz::openbmc_project::Inventory::Connector::server::Slot>,
Patrick Williams77b9c472022-07-22 19:26:57 -050049 sdbusplus::server::object_t<
Jie Yange7cf3192021-08-20 11:21:43 -070050 sdbusplus::xyz::openbmc_project::Inventory::server::Item>,
Patrick Williams77b9c472022-07-22 19:26:57 -050051 sdbusplus::server::object_t<
Tim Leedc469c72021-07-20 10:55:58 +080052 sdbusplus::xyz::openbmc_project::Association::server::Definitions>,
Patrick Williams77b9c472022-07-22 19:26:57 -050053 sdbusplus::server::object_t<sdbusplus::xyz::openbmc_project::State::
54 Decorator::server::OperationalStatus>
Cheng C Yang8c3fab62019-12-19 00:51:06 +080055{
56 public:
57 Dimm() = delete;
58 ~Dimm() = default;
59 Dimm(const Dimm&) = delete;
60 Dimm& operator=(const Dimm&) = delete;
61 Dimm(Dimm&&) = default;
62 Dimm& operator=(Dimm&&) = default;
63
Patrick Williams77b9c472022-07-22 19:26:57 -050064 Dimm(sdbusplus::bus_t& bus, const std::string& objPath,
Jie Yange7cf3192021-08-20 11:21:43 -070065 const uint8_t& dimmId, uint8_t* smbiosTableStorage,
66 const std::string& motherboard) :
Cheng C Yang8c3fab62019-12-19 00:51:06 +080067
Patrick Williams77b9c472022-07-22 19:26:57 -050068 sdbusplus::server::object_t<
Cheng C Yang8c3fab62019-12-19 00:51:06 +080069 sdbusplus::xyz::openbmc_project::Inventory::Item::server::Dimm>(
70 bus, objPath.c_str()),
Patrick Williams77b9c472022-07-22 19:26:57 -050071 sdbusplus::server::object_t<sdbusplus::xyz::openbmc_project::Inventory::
72 Decorator::server::Asset>(
73 bus, objPath.c_str()),
74 sdbusplus::server::object_t<sdbusplus::xyz::openbmc_project::Inventory::
75 Decorator::server::LocationCode>(
76 bus, objPath.c_str()),
77 sdbusplus::server::object_t<sdbusplus::xyz::openbmc_project::Inventory::
78 Connector::server::Slot>(
79 bus, objPath.c_str()),
80 sdbusplus::server::object_t<
Joshi-Mansi33c948a2021-03-20 00:58:50 +053081 sdbusplus::xyz::openbmc_project::Inventory::server::Item>(
82 bus, objPath.c_str()),
Patrick Williams77b9c472022-07-22 19:26:57 -050083 sdbusplus::server::object_t<
Jie Yange7cf3192021-08-20 11:21:43 -070084 sdbusplus::xyz::openbmc_project::Association::server::Definitions>(
85 bus, objPath.c_str()),
Patrick Williams77b9c472022-07-22 19:26:57 -050086 sdbusplus::server::object_t<sdbusplus::xyz::openbmc_project::State::
87 Decorator::server::OperationalStatus>(
88 bus, objPath.c_str()),
Jie Yange7cf3192021-08-20 11:21:43 -070089 dimmNum(dimmId), storage(smbiosTableStorage),
90 motherboardPath(motherboard)
Cheng C Yang8c3fab62019-12-19 00:51:06 +080091 {
92 memoryInfoUpdate();
93 }
94
95 void memoryInfoUpdate(void);
96
97 uint16_t memoryDataWidth(uint16_t value) override;
Jason M. Billse7770992021-05-14 13:24:33 -070098 size_t memorySizeInKB(size_t value) override;
Cheng C Yang8c3fab62019-12-19 00:51:06 +080099 std::string memoryDeviceLocator(std::string value) override;
100 DeviceType memoryType(DeviceType value) override;
101 std::string memoryTypeDetail(std::string value) override;
102 uint16_t maxMemorySpeedInMhz(uint16_t value) override;
103 std::string manufacturer(std::string value) override;
Joshi-Mansi33c948a2021-03-20 00:58:50 +0530104 bool present(bool value) override;
Cheng C Yang8c3fab62019-12-19 00:51:06 +0800105 std::string serialNumber(std::string value) override;
106 std::string partNumber(std::string value) override;
Jie Yang31720392021-07-22 21:45:45 -0700107 std::string locationCode(std::string value) override;
Cheng C Yang8c3fab62019-12-19 00:51:06 +0800108 uint8_t memoryAttributes(uint8_t value) override;
109 uint16_t memoryConfiguredSpeedInMhz(uint16_t value) override;
Tim Leedc469c72021-07-20 10:55:58 +0800110 bool functional(bool value) override;
kasunath2eca4fe2022-08-17 17:30:07 -0700111 EccType ecc(EccType value) override;
Cheng C Yang8c3fab62019-12-19 00:51:06 +0800112
113 private:
114 uint8_t dimmNum;
115
116 uint8_t* storage;
117
Jie Yange7cf3192021-08-20 11:21:43 -0700118 std::string motherboardPath;
119
Cheng C Yang8c3fab62019-12-19 00:51:06 +0800120 void dimmSize(const uint16_t size);
Joseph Fu0b1d9422023-03-31 17:47:12 +0800121 void dimmSizeExt(const uint32_t size);
Konstantin Aladyshev744b35a2022-11-02 08:34:27 +0000122 void dimmDeviceLocator(const uint8_t bankLocatorPositionNum,
123 const uint8_t deviceLocatorPositionNum,
124 const uint8_t structLen, uint8_t* dataIn);
Cheng C Yang8c3fab62019-12-19 00:51:06 +0800125 void dimmType(const uint8_t type);
126 void dimmTypeDetail(const uint16_t detail);
127 void dimmManufacturer(const uint8_t positionNum, const uint8_t structLen,
128 uint8_t* dataIn);
129 void dimmSerialNum(const uint8_t positionNum, const uint8_t structLen,
130 uint8_t* dataIn);
131 void dimmPartNum(const uint8_t positionNum, const uint8_t structLen,
132 uint8_t* dataIn);
kasunath2eca4fe2022-08-17 17:30:07 -0700133 void updateEccType(uint16_t exPhyArrayHandle);
Cheng C Yang8c3fab62019-12-19 00:51:06 +0800134};
135
Zhikui Ren18a5ab92020-09-01 21:35:20 -0700136struct MemoryInfo
137{
138 uint8_t type;
139 uint8_t length;
140 uint16_t handle;
141 uint16_t phyArrayHandle;
142 uint16_t errInfoHandle;
143 uint16_t totalWidth;
144 uint16_t dataWidth;
145 uint16_t size;
146 uint8_t formFactor;
147 uint8_t deviceSet;
148 uint8_t deviceLocator;
149 uint8_t bankLocator;
150 uint8_t memoryType;
151 uint16_t typeDetail;
152 uint16_t speed;
153 uint8_t manufacturer;
154 uint8_t serialNum;
155 uint8_t assetTag;
156 uint8_t partNum;
157 uint8_t attributes;
Joseph Fu0b1d9422023-03-31 17:47:12 +0800158 uint32_t extendedSize;
Zhikui Ren18a5ab92020-09-01 21:35:20 -0700159 uint16_t confClockSpeed;
160 uint16_t minimumVoltage;
161 uint16_t maximumVoltage;
162 uint16_t configuredVoltage;
163 uint8_t memoryTechnology;
164 uint16_t memoryOperatingModeCap;
165 uint8_t firwareVersion;
166 uint16_t modelManufId;
167 uint16_t modelProdId;
168 uint16_t memSubConManufId;
169 uint16_t memSubConProdId;
170 uint64_t nvSize;
171 uint64_t volatileSize;
172 uint64_t cacheSize;
173 uint64_t logicalSize;
174} __attribute__((packed));
175
kasunath2eca4fe2022-08-17 17:30:07 -0700176/**
177 * @brief Struct to represent SMBIOS 3.2 type-16 (Physical Memory Array) data.
178 */
179struct PhysicalMemoryArrayInfo
180{
181 uint8_t type;
182 uint8_t length;
183 uint16_t handle;
184 uint8_t location;
185 uint8_t use;
186 uint8_t memoryErrorCorrection;
187 uint32_t maximumCapacity;
188 uint16_t memoryErrorInformationHandle;
189 uint16_t numberOfMemoryDevices;
190 uint64_t extendedMaximumCapacity;
191} __attribute__((packed));
192static_assert(sizeof(PhysicalMemoryArrayInfo) == 23,
193 "Size of PhysicalMemoryArrayInfo struct is incorrect.");
194
Cheng C Yang8c3fab62019-12-19 00:51:06 +0800195const std::map<uint8_t, DeviceType> dimmTypeTable = {
196 {0x1, DeviceType::Other}, {0x2, DeviceType::Unknown},
197 {0x3, DeviceType::DRAM}, {0x4, DeviceType::EDRAM},
198 {0x5, DeviceType::VRAM}, {0x6, DeviceType::SRAM},
199 {0x7, DeviceType::RAM}, {0x8, DeviceType::ROM},
200 {0x9, DeviceType::FLASH}, {0xa, DeviceType::EEPROM},
201 {0xb, DeviceType::FEPROM}, {0xc, DeviceType::EPROM},
202 {0xd, DeviceType::CDRAM}, {0xe, DeviceType::ThreeDRAM},
203 {0xf, DeviceType::SDRAM}, {0x10, DeviceType::DDR_SGRAM},
204 {0x11, DeviceType::RDRAM}, {0x12, DeviceType::DDR},
205 {0x13, DeviceType::DDR2}, {0x14, DeviceType::DDR2_SDRAM_FB_DIMM},
206 {0x18, DeviceType::DDR3}, {0x19, DeviceType::FBD2},
207 {0x1a, DeviceType::DDR4}, {0x1b, DeviceType::LPDDR_SDRAM},
208 {0x1c, DeviceType::LPDDR2_SDRAM}, {0x1d, DeviceType::LPDDR3_SDRAM},
209 {0x1e, DeviceType::LPDDR4_SDRAM}, {0x1f, DeviceType::Logical},
Mansi Joshi7ece93a2021-07-19 15:07:52 +0530210 {0x20, DeviceType::HBM}, {0x21, DeviceType::HBM2},
211 {0x22, DeviceType::DDR5}, {0x23, DeviceType::LPDDR5_SDRAM}};
Cheng C Yang8c3fab62019-12-19 00:51:06 +0800212
213const std::array<std::string, 16> detailTable{
214 "Reserved", "Other", "Unknown", "Fast-paged",
215 "Static column", "Pseudo-static", "RAMBUS", "Synchronous",
216 "CMOS", "EDO", "Window DRAM", "Cache DRAM",
217 "Non-volatile", "Registered", "Unbuffered", "LRDIMM"};
218
kasunath2eca4fe2022-08-17 17:30:07 -0700219/**
220 * @brief Map SMBIOS 3.2 Memory Array Error Correction Types to
221 * xyz.openbmc_project.Inventory.Item.Dimm.Ecc types.
222 *
223 * SMBIOS 3.2 Memory Array Error Correction Types 'Unknown', 'None', 'CRC' are
224 * mapped to EccType::NoECC since the DBUs interface does not support those
225 * representations.
226 */
227const std::map<uint8_t, EccType> dimmEccTypeMap = {
228 {0x1, EccType::NoECC}, {0x2, EccType::NoECC},
229 {0x3, EccType::NoECC}, {0x4, EccType::AddressParity},
230 {0x5, EccType::SingleBitECC}, {0x6, EccType::MultiBitECC},
231 {0x7, EccType::NoECC}};
232
Cheng C Yang8c3fab62019-12-19 00:51:06 +0800233} // namespace smbios
234
235} // namespace phosphor