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Cheng C Yang43c6a1d2019-12-19 00:48:34 +08001/*
2// Copyright (c) 2018 Intel Corporation
3//
4// Licensed under the Apache License, Version 2.0 (the "License");
5// you may not use this file except in compliance with the License.
6// You may obtain a copy of the License at
7//
8// http://www.apache.org/licenses/LICENSE-2.0
9//
10// Unless required by applicable law or agreed to in writing, software
11// distributed under the License is distributed on an "AS IS" BASIS,
12// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13// See the License for the specific language governing permissions and
14// limitations under the License.
15*/
16
17#pragma once
Zhikui Ren18a5ab92020-09-01 21:35:20 -070018#include "smbios_mdrv2.hpp"
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080019
Jie Yange7cf3192021-08-20 11:21:43 -070020#include <xyz/openbmc_project/Association/Definitions/server.hpp>
Jie Yang41654fc2021-09-07 20:26:32 -070021#include <xyz/openbmc_project/Inventory/Connector/Slot/server.hpp>
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080022#include <xyz/openbmc_project/Inventory/Decorator/Asset/server.hpp>
Jie Yang31720392021-07-22 21:45:45 -070023#include <xyz/openbmc_project/Inventory/Decorator/LocationCode/server.hpp>
Zhikui Ren18a5ab92020-09-01 21:35:20 -070024#include <xyz/openbmc_project/Inventory/Decorator/Revision/server.hpp>
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080025#include <xyz/openbmc_project/Inventory/Item/Cpu/server.hpp>
Jonathan Doman563570d2021-05-24 10:52:43 -070026#include <xyz/openbmc_project/Inventory/Item/server.hpp>
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080027
28namespace phosphor
29{
30
31namespace smbios
32{
33
Zhikui Ren18a5ab92020-09-01 21:35:20 -070034using rev =
35 sdbusplus::xyz::openbmc_project::Inventory::Decorator::server::Revision;
36using asset =
37 sdbusplus::xyz::openbmc_project::Inventory::Decorator::server::Asset;
Jie Yang31720392021-07-22 21:45:45 -070038using location =
39 sdbusplus::xyz::openbmc_project::Inventory::Decorator::server::LocationCode;
Jie Yang41654fc2021-09-07 20:26:32 -070040using connector =
41 sdbusplus::xyz::openbmc_project::Inventory::Connector::server::Slot;
Zhikui Ren18a5ab92020-09-01 21:35:20 -070042using processor = sdbusplus::xyz::openbmc_project::Inventory::Item::server::Cpu;
Jonathan Doman563570d2021-05-24 10:52:43 -070043using Item = sdbusplus::xyz::openbmc_project::Inventory::server::Item;
Jie Yange7cf3192021-08-20 11:21:43 -070044using association =
45 sdbusplus::xyz::openbmc_project::Association::server::Definitions;
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080046
47// Definition follow smbios spec DSP0134 3.0.0
Cheng C Yang2ca7a0f2019-12-19 10:46:42 +080048static const std::map<uint8_t, const char*> familyTable = {
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080049 {0x1, "Other"},
50 {0x2, "Unknown"},
51 {0x10, "Pentium II Xeon processor"},
52 {0xa1, "Quad-Core Intel Xeon processor 3200 Series"},
53 {0xa2, "Dual-Core Intel Xeon processor 3000 Series"},
54 {0xa3, "Quad-Core Intel Xeon processor 5300 Series"},
55 {0xa4, "Dual-Core Intel Xeon processor 5100 Series"},
56 {0xa5, "Dual-Core Intel Xeon processor 5000 Series"},
57 {0xa6, "Dual-Core Intel Xeon processor LV"},
58 {0xa7, "Dual-Core Intel Xeon processor ULV"},
59 {0xa8, "Dual-Core Intel Xeon processor 7100 Series"},
60 {0xa9, "Quad-Core Intel Xeon processor 5400 Series"},
61 {0xaa, "Quad-Core Intel Xeon processor"},
62 {0xab, "Dual-Core Intel Xeon processor 5200 Series"},
63 {0xac, "Dual-Core Intel Xeon processor 7200 Series"},
64 {0xad, "Quad-Core Intel Xeon processor 7300 Series"},
65 {0xae, "Quad-Core Intel Xeon processor 7400 Series"},
66 {0xaf, "Multi-Core Intel Xeon processor 7400 Series"},
67 {0xb0, "Pentium III Xeon processor"},
68 {0xb3, "Intel Xeon processor"},
69 {0xb5, "Intel Xeon processor MP"},
70 {0xd6, "Multi-Core Intel Xeon processor"},
71 {0xd7, "Dual-Core Intel Xeon processor 3xxx Series"},
72 {0xd8, "Quad-Core Intel Xeon processor 3xxx Series"},
73 {0xd9, "VIA Nano Processor Family"},
74 {0xda, "Dual-Core Intel Xeon processor 5xxx Series"},
75 {0xdb, "Quad-Core Intel Xeon processor 5xxx Series"},
76 {0xdd, "Dual-Core Intel Xeon processor 7xxx Series"},
77 {0xde, "Quad-Core Intel Xeon processor 7xxx Series"},
78 {0xdf, "Multi-Core Intel Xeon processor 7xxx Series"},
79 {0xe0, "Multi-Core Intel Xeon processor 3400 Series"}
80
81};
82
83// Definition follow smbios spec DSP0134 3.0.0
Zhikui Ren18a5ab92020-09-01 21:35:20 -070084static const std::array<std::optional<processor::Capability>, 16>
85 characteristicsTable{std::nullopt,
86 std::nullopt,
87 processor::Capability::Capable64bit,
88 processor::Capability::MultiCore,
89 processor::Capability::HardwareThread,
90 processor::Capability::ExecuteProtection,
91 processor::Capability::EnhancedVirtualization,
92 processor::Capability::PowerPerformanceControl,
93 std::nullopt,
94 std::nullopt,
95 std::nullopt,
96 std::nullopt,
97 std::nullopt,
98 std::nullopt,
99 std::nullopt,
100 std::nullopt};
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800101
Jie Yang41654fc2021-09-07 20:26:32 -0700102class Cpu :
103 sdbusplus::server::object_t<processor, asset, location, connector, rev,
Jie Yange7cf3192021-08-20 11:21:43 -0700104 Item, association>
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800105{
106 public:
107 Cpu() = delete;
Cheng C Yang2ca7a0f2019-12-19 10:46:42 +0800108 Cpu(const Cpu&) = delete;
109 Cpu& operator=(const Cpu&) = delete;
110 Cpu(Cpu&&) = delete;
111 Cpu& operator=(Cpu&&) = delete;
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800112 ~Cpu() = default;
113
Cheng C Yang2ca7a0f2019-12-19 10:46:42 +0800114 Cpu(sdbusplus::bus::bus& bus, const std::string& objPath,
Jie Yange7cf3192021-08-20 11:21:43 -0700115 const uint8_t& cpuId, uint8_t* smbiosTableStorage,
116 const std::string& motherboard) :
Jie Yang41654fc2021-09-07 20:26:32 -0700117 sdbusplus::server::object_t<processor, asset, location, connector, rev,
Jie Yange7cf3192021-08-20 11:21:43 -0700118 Item, association>(bus, objPath.c_str()),
119 cpuNum(cpuId), storage(smbiosTableStorage), motherboardPath(motherboard)
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800120 {
Zhikui Ren18a5ab92020-09-01 21:35:20 -0700121 infoUpdate();
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800122 }
123
Zhikui Ren18a5ab92020-09-01 21:35:20 -0700124 void infoUpdate(void);
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800125
126 private:
127 uint8_t cpuNum;
128
Cheng C Yang2ca7a0f2019-12-19 10:46:42 +0800129 uint8_t* storage;
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800130
Jie Yange7cf3192021-08-20 11:21:43 -0700131 std::string motherboardPath;
132
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800133 struct ProcessorInfo
134 {
135 uint8_t type;
136 uint8_t length;
137 uint16_t handle;
138 uint8_t socketDesignation;
139 uint8_t processorType;
140 uint8_t family;
141 uint8_t manufacturer;
142 uint64_t id;
143 uint8_t version;
144 uint8_t voltage;
145 uint16_t exClock;
146 uint16_t maxSpeed;
147 uint16_t currSpeed;
148 uint8_t status;
149 uint8_t upgrade;
150 uint16_t l1Handle;
151 uint16_t l2Handle;
152 uint16_t l3Handle;
153 uint8_t serialNum;
154 uint8_t assetTag;
155 uint8_t partNum;
156 uint8_t coreCount;
157 uint8_t coreEnable;
158 uint8_t threadCount;
159 uint16_t characteristics;
160 uint16_t family2;
161 uint16_t coreCount2;
162 uint16_t coreEnable2;
163 uint16_t threadCount2;
164 } __attribute__((packed));
165
Zhikui Ren18a5ab92020-09-01 21:35:20 -0700166 void socket(const uint8_t positionNum, const uint8_t structLen,
167 uint8_t* dataIn);
168 void family(const uint8_t value);
169 void manufacturer(const uint8_t positionNum, const uint8_t structLen,
170 uint8_t* dataIn);
Charles Boyere6431692021-08-31 16:47:47 -0500171 void serialNumber(const uint8_t positionNum, const uint8_t structLen,
172 uint8_t* dataIn);
173 void partNumber(const uint8_t positionNum, const uint8_t structLen,
174 uint8_t* dataIn);
Zhikui Ren18a5ab92020-09-01 21:35:20 -0700175 void version(const uint8_t positionNum, const uint8_t structLen,
176 uint8_t* dataIn);
177 void characteristics(const uint16_t value);
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800178};
179
180} // namespace smbios
181
182} // namespace phosphor