Jonathan Doman | 94c94bf | 2020-10-05 23:25:45 -0700 | [diff] [blame] | 1 | // Copyright (c) 2020 Intel Corporation |
| 2 | // |
| 3 | // Licensed under the Apache License, Version 2.0 (the "License"); |
| 4 | // you may not use this file except in compliance with the License. |
| 5 | // You may obtain a copy of the License at |
| 6 | // |
| 7 | // http://www.apache.org/licenses/LICENSE-2.0 |
| 8 | // |
| 9 | // Unless required by applicable law or agreed to in writing, software |
| 10 | // distributed under the License is distributed on an "AS IS" BASIS, |
| 11 | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 12 | // See the License for the specific language governing permissions and |
| 13 | // limitations under the License. |
| 14 | #pragma once |
| 15 | |
Jonathan Doman | 16a2ced | 2021-11-01 11:13:22 -0700 | [diff] [blame] | 16 | #include <peci.h> |
| 17 | |
Jonathan Doman | 94c94bf | 2020-10-05 23:25:45 -0700 | [diff] [blame] | 18 | #include <boost/asio/io_context.hpp> |
| 19 | #include <sdbusplus/asio/connection.hpp> |
| 20 | |
Jonathan Doman | 16a2ced | 2021-11-01 11:13:22 -0700 | [diff] [blame] | 21 | #include <bitset> |
| 22 | #include <iostream> |
| 23 | |
Jonathan Doman | 94c94bf | 2020-10-05 23:25:45 -0700 | [diff] [blame] | 24 | namespace cpu_info |
| 25 | { |
| 26 | namespace sst |
| 27 | { |
| 28 | |
| 29 | /** |
Jonathan Doman | 49ea830 | 2022-05-26 14:29:46 -0700 | [diff] [blame] | 30 | * Initialize SST subsystem. |
| 31 | * |
| 32 | * This will schedule work to be done when the host is ready, in order to |
| 33 | * retrieve all SST configuration info for all discoverable CPUs, and publish |
Jonathan Doman | 94c94bf | 2020-10-05 23:25:45 -0700 | [diff] [blame] | 34 | * the info on new D-Bus objects on the given bus connection. |
Jonathan Doman | 94c94bf | 2020-10-05 23:25:45 -0700 | [diff] [blame] | 35 | */ |
Jonathan Doman | 49ea830 | 2022-05-26 14:29:46 -0700 | [diff] [blame] | 36 | void init(); |
Jonathan Doman | 94c94bf | 2020-10-05 23:25:45 -0700 | [diff] [blame] | 37 | |
Jonathan Doman | 16a2ced | 2021-11-01 11:13:22 -0700 | [diff] [blame] | 38 | class PECIError : public std::runtime_error |
| 39 | { |
| 40 | using std::runtime_error::runtime_error; |
| 41 | }; |
| 42 | |
| 43 | bool checkPECIStatus(EPECIStatus libStatus, uint8_t completionCode); |
| 44 | |
| 45 | constexpr int extendedModel(CPUModel model) |
| 46 | { |
| 47 | return (model >> 16) & 0xF; |
| 48 | } |
| 49 | |
| 50 | /** |
| 51 | * Construct a list of indexes of the set bits in the input value. |
| 52 | * E.g. fn(0x7A) -> {1,3,4,5,6} |
| 53 | * |
| 54 | * @param[in] mask Bitmask to convert. |
| 55 | * |
| 56 | * @return List of bit indexes. |
| 57 | */ |
Jonathan Doman | 49ea830 | 2022-05-26 14:29:46 -0700 | [diff] [blame] | 58 | std::vector<uint32_t> convertMaskToList(std::bitset<64> mask); |
Jonathan Doman | 16a2ced | 2021-11-01 11:13:22 -0700 | [diff] [blame] | 59 | |
| 60 | using TurboEntry = std::tuple<uint32_t, size_t>; |
| 61 | |
| 62 | /** |
| 63 | * Abstract interface that must be implemented by backends, allowing discovery |
| 64 | * and control of a single CPU package. |
| 65 | */ |
| 66 | class SSTInterface |
| 67 | { |
| 68 | public: |
Patrick Williams | c39d3df | 2023-05-10 07:51:14 -0500 | [diff] [blame] | 69 | virtual ~SSTInterface() {} |
Jonathan Doman | 16a2ced | 2021-11-01 11:13:22 -0700 | [diff] [blame] | 70 | |
| 71 | /** |
| 72 | * Whether the interface is ready to be used, or we need to wait longer. The |
| 73 | * backend may need to wait e.g. for the host BIOS to initialize the |
| 74 | * interface. |
| 75 | */ |
| 76 | virtual bool ready() = 0; |
| 77 | |
| 78 | /** Whether the processor supports the control ("set") functions. */ |
| 79 | virtual bool supportsControl() = 0; |
| 80 | |
| 81 | /** Whether SST-PP is enabled on the processor. */ |
| 82 | virtual bool ppEnabled() = 0; |
| 83 | /** Return the current SST-PP configuration level */ |
| 84 | virtual unsigned int currentLevel() = 0; |
| 85 | /** Return the maximum valid SST-PP configuration level */ |
Jonathan Doman | b4c3bcd | 2023-03-09 11:41:41 -0800 | [diff] [blame] | 86 | virtual unsigned int maxLevel() = 0; |
Jonathan Doman | 16a2ced | 2021-11-01 11:13:22 -0700 | [diff] [blame] | 87 | |
| 88 | /** |
| 89 | * Whether the given level is supported. The level indices may be |
| 90 | * discontinuous, so this function should be used before querying deeper |
| 91 | * properties of a level. |
| 92 | */ |
| 93 | virtual bool levelSupported(unsigned int level) = 0; |
| 94 | /** Whether SST-BF is supported in a given level. */ |
| 95 | virtual bool bfSupported(unsigned int level) = 0; |
| 96 | /** Whether SST-TF is supported in a given level. */ |
| 97 | virtual bool tfSupported(unsigned int level) = 0; |
| 98 | /** Whether SST-BF is enabled in a given level. */ |
| 99 | virtual bool bfEnabled(unsigned int level) = 0; |
| 100 | /** Whether SST-TF is enabled in a given level. */ |
| 101 | virtual bool tfEnabled(unsigned int level) = 0; |
| 102 | /** Return the package Thermal Design Power in Watts for a given level. */ |
| 103 | virtual unsigned int tdp(unsigned int level) = 0; |
| 104 | /** Return the number of cores enabled in a given level. */ |
| 105 | virtual unsigned int coreCount(unsigned int level) = 0; |
| 106 | /** Return the list of enabled logical core indices for a given level. */ |
| 107 | virtual std::vector<unsigned int> enabledCoreList(unsigned int level) = 0; |
| 108 | /** |
| 109 | * Return the list of TurboEntrys which define the SSE turbo profile for a |
| 110 | * given level. |
| 111 | */ |
| 112 | virtual std::vector<TurboEntry> sseTurboProfile(unsigned int level) = 0; |
| 113 | /** Return the base frequency (P1) for a given level. */ |
| 114 | virtual unsigned int p1Freq(unsigned int level) = 0; |
| 115 | /** Return the maximum single-core frequency (P0) for a given level. */ |
| 116 | virtual unsigned int p0Freq(unsigned int level) = 0; |
| 117 | /** |
| 118 | * Return the DTS max or external Prochot temperature in degrees Celsius |
| 119 | * for a given level. |
| 120 | */ |
| 121 | virtual unsigned int prochotTemp(unsigned int level) = 0; |
| 122 | /** |
| 123 | * Return the list of logical core indices which have high priority when |
| 124 | * SST-BF is enabled for a given level. |
| 125 | */ |
| 126 | virtual std::vector<unsigned int> |
| 127 | bfHighPriorityCoreList(unsigned int level) = 0; |
| 128 | /** Return the high priority base frequency for a given level. */ |
| 129 | virtual unsigned int bfHighPriorityFreq(unsigned int level) = 0; |
| 130 | /** Return the low priority base frequency for a given level. */ |
| 131 | virtual unsigned int bfLowPriorityFreq(unsigned int level) = 0; |
| 132 | |
| 133 | /** Enable or disable SST-BF for the current configuration. */ |
| 134 | virtual void setBfEnabled(bool enable) = 0; |
| 135 | /** Enable or disable SST-TF for the current configuration. */ |
| 136 | virtual void setTfEnabled(bool enable) = 0; |
| 137 | /** Change the current configuration to the given level. */ |
| 138 | virtual void setCurrentLevel(unsigned int level) = 0; |
| 139 | }; |
| 140 | |
| 141 | /** |
Jonathan Doman | b5d7222 | 2024-01-11 14:20:13 -0800 | [diff] [blame] | 142 | * Policy for whether the SST interface should wake up an idle CPU to complete |
| 143 | * requested operations. Waking should be used sparingly to avoid excess CPU |
| 144 | * power draw, so the policy depends on the context. |
| 145 | */ |
| 146 | enum WakePolicy |
| 147 | { |
| 148 | /** |
| 149 | * If CPU rejects the request due to being in a low-power state, enable |
| 150 | * wake-on-PECI on the CPU and retry. Wake-on-PECI is disabled for the CPU |
| 151 | * when the SST interface is destroyed. |
| 152 | */ |
| 153 | wakeAllowed, |
| 154 | |
| 155 | /** |
| 156 | * If CPU rejects the request due to being in a low-power state, it results |
| 157 | * in a PECIError exception. |
| 158 | */ |
| 159 | dontWake |
| 160 | }; |
| 161 | |
| 162 | /** |
Jonathan Doman | 16a2ced | 2021-11-01 11:13:22 -0700 | [diff] [blame] | 163 | * BackendProvider represents a function which may create an SSTInterface given |
| 164 | * a CPU PECI address, and the CPU Model information. Usually the CPUModel is |
| 165 | * sufficient to determine if the backend is supported. |
| 166 | * Backend should return nullptr to indicate it doesn't support a given CPU. |
| 167 | * The SST upper layer will call the registered backend provider functions in |
| 168 | * arbitrary order until one of them returns a non-null pointer. |
| 169 | */ |
| 170 | using BackendProvider = |
Jonathan Doman | b5d7222 | 2024-01-11 14:20:13 -0800 | [diff] [blame] | 171 | std::function<std::unique_ptr<SSTInterface>(uint8_t, CPUModel, WakePolicy)>; |
Jonathan Doman | 16a2ced | 2021-11-01 11:13:22 -0700 | [diff] [blame] | 172 | |
| 173 | /** |
| 174 | * Backends should use 1 instance of the SSTProviderRegistration macro at file |
| 175 | * scope to register their provider function. This static struct instance |
| 176 | * register the backend before main() is run, and prevents the upper layer from |
| 177 | * having to know about which backends exist. |
| 178 | */ |
| 179 | #define SSTProviderRegistration(fn) \ |
| 180 | struct fn##Register \ |
| 181 | { \ |
| 182 | fn##Register() \ |
| 183 | { \ |
| 184 | std::cerr << "Registering SST Provider " #fn << std::endl; \ |
| 185 | registerBackend(fn); \ |
| 186 | } \ |
| 187 | } fn##Instance; |
| 188 | void registerBackend(BackendProvider); |
| 189 | |
Jonathan Doman | 94c94bf | 2020-10-05 23:25:45 -0700 | [diff] [blame] | 190 | } // namespace sst |
| 191 | } // namespace cpu_info |