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gerrit.openbmc.org / stefanberger / openbmc / c62cacb041ef93ee8fb6e954c238058f2057cf09 / . / meta-xilinx / meta-microblaze / recipes-devtools / gcc / gcc-10 / 0036-Added-double-arith-instructions.patch
blob: 3f52e879956e1429259a9f3c1ea2c8288e8dc500 [file] [log] [blame]
Andrew Geissler10fa1492020-12-11 16:25:29 -0600[diff] [blame]1From 2bb5cef1a85d63ebf155bcb0070492b0ad298dd8 Mon Sep 17 00:00:00 2001
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]2From: Nagaraju Mekala <nmekala@xilix.com>
3Date: Tue, 9 Oct 2018 10:07:08 +0530
Andrew Geissler10fa1492020-12-11 16:25:29 -0600[diff] [blame]4Subject: [PATCH 36/54] -Added double arith instructions -Fixed prologue stack
5 pointer decrement issue
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]6
7---
Andrew Geisslera9ff2b32020-10-16 10:11:54 -0500[diff] [blame]8 gcc/config/microblaze/microblaze.md | 78 +++++++++++++++++++++++++----
9 gcc/config/microblaze/t-microblaze | 7 +++
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]10 2 files changed, 76 insertions(+), 9 deletions(-)
11
12diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
Andrew Geissler10fa1492020-12-11 16:25:29 -0600[diff] [blame]13index 74bb30cb9e8..1401d6b77ff 100644
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]14--- a/gcc/config/microblaze/microblaze.md
15+++ b/gcc/config/microblaze/microblaze.md
Andrew Geissler84ad7c52020-06-27 00:00:16 -0500[diff] [blame]16@@ -527,6 +527,66 @@
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]17 (set_attr "mode" "SF")
18 (set_attr "length" "4")])
19
20+(define_insn "fix_truncsfsi2"
21+ [(set (match_operand:SI 0 "register_operand" "=d")
22+ (fix:SI (match_operand:SF 1 "register_operand" "d")))]
23+ "TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT"
24+ "fint\t%0,%1"
25+ [(set_attr "type" "fint")
26+ (set_attr "mode" "SF")
27+ (set_attr "length" "4")])
28+
29+
30+(define_insn "adddf3"
31+ [(set (match_operand:DF 0 "register_operand" "=d")
32+ (plus:DF (match_operand:DF 1 "register_operand" "d")
33+ (match_operand:DF 2 "register_operand" "d")))]
34+ "TARGET_MB_64"
35+ "dadd\t%0,%1,%2"
36+ [(set_attr "type" "fadd")
37+ (set_attr "mode" "DF")
38+ (set_attr "length" "4")])
39+
40+(define_insn "subdf3"
41+ [(set (match_operand:DF 0 "register_operand" "=d")
42+ (minus:DF (match_operand:DF 1 "register_operand" "d")
43+ (match_operand:DF 2 "register_operand" "d")))]
44+ "TARGET_MB_64"
45+ "drsub\t%0,%2,%1"
46+ [(set_attr "type" "frsub")
47+ (set_attr "mode" "DF")
48+ (set_attr "length" "4")])
49+
50+(define_insn "muldf3"
51+ [(set (match_operand:DF 0 "register_operand" "=d")
52+ (mult:DF (match_operand:DF 1 "register_operand" "d")
53+ (match_operand:DF 2 "register_operand" "d")))]
54+ "TARGET_MB_64"
55+ "dmul\t%0,%1,%2"
56+ [(set_attr "type" "fmul")
57+ (set_attr "mode" "DF")
58+ (set_attr "length" "4")])
59+
60+(define_insn "divdf3"
61+ [(set (match_operand:DF 0 "register_operand" "=d")
62+ (div:DF (match_operand:DF 1 "register_operand" "d")
63+ (match_operand:DF 2 "register_operand" "d")))]
64+ "TARGET_MB_64"
65+ "ddiv\t%0,%2,%1"
66+ [(set_attr "type" "fdiv")
67+ (set_attr "mode" "DF")
68+ (set_attr "length" "4")])
69+
70+
71+(define_insn "sqrtdf2"
72+ [(set (match_operand:DF 0 "register_operand" "=d")
73+ (sqrt:DF (match_operand:DF 1 "register_operand" "d")))]
74+ "TARGET_MB_64"
75+ "dsqrt\t%0,%1"
76+ [(set_attr "type" "fsqrt")
77+ (set_attr "mode" "DF")
78+ (set_attr "length" "4")])
79+
80 (define_insn "floatdidf2"
81 [(set (match_operand:DF 0 "register_operand" "=d")
82 (float:DF (match_operand:DI 1 "register_operand" "d")))]
Andrew Geissler84ad7c52020-06-27 00:00:16 -0500[diff] [blame]83@@ -536,13 +596,13 @@
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]84 (set_attr "mode" "DF")
85 (set_attr "length" "4")])
86
87-(define_insn "fix_truncsfsi2"
88- [(set (match_operand:SI 0 "register_operand" "=d")
89- (fix:SI (match_operand:SF 1 "register_operand" "d")))]
90- "TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT"
91- "fint\t%0,%1"
92- [(set_attr "type" "fint")
93- (set_attr "mode" "SF")
94+(define_insn "floatdfdi2"
95+ [(set (match_operand:DI 0 "register_operand" "=d")
96+ (float:DI (match_operand:DF 1 "register_operand" "d")))]
97+ "TARGET_MB_64"
98+ "dlong\t%0,%1"
99+ [(set_attr "type" "fcvt")
100+ (set_attr "mode" "DI")
101 (set_attr "length" "4")])
102
103 ;;----------------------------------------------------------------
Andrew Geissler84ad7c52020-06-27 00:00:16 -0500[diff] [blame]104@@ -660,8 +720,8 @@
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]105 "TARGET_MB_64"
106 "@
107 rsubl\t%0,%2,%1
108- addik\t%0,%z1,-%2
109- addik\t%0,%z1,-%2"
110+ addlik\t%0,%z1,-%2
111+ addlik\t%0,%z1,-%2"
112 [(set_attr "type" "arith,no_delay_arith,no_delay_arith")
113 (set_attr "mode" "DI")
114 (set_attr "length" "4,4,4")])
115diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze
Andrew Geisslera9ff2b32020-10-16 10:11:54 -0500[diff] [blame]116index 35ab9654052..dfef45c268e 100644
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]117--- a/gcc/config/microblaze/t-microblaze
118+++ b/gcc/config/microblaze/t-microblaze
119@@ -1,6 +1,13 @@
120 MULTILIB_OPTIONS = m64 mxl-barrel-shift mlittle-endian mno-xl-soft-mul mxl-multiply-high
121 MULTILIB_DIRNAMES = m64 bs le m mh
122 MULTILIB_EXCEPTIONS = *m64/mxl-multiply-high mxl-multiply-high
123+MULTILIB_EXCEPTIONS += *m64
124+MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift
125+MULTILIB_EXCEPTIONS += *m64/mno-xl-soft-mul
126+MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mno-xl-soft-mul
127+MULTILIB_EXCEPTIONS += *m64/mno-xl-soft-mul
128+MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mno-xl-soft-mul/mxl-multiply-high
129+MULTILIB_EXCEPTIONS += *m64/mno-xl-soft-mul/mxl-multiply-high
130 MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high
131 MULTILIB_EXCEPTIONS += *mlittle-endian/mxl-multiply-high mxl-multiply-high
132 MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mlittle-endian/mxl-multiply-high
133--
Andrew Geisslera9ff2b32020-10-16 10:11:54 -0500[diff] [blame]1342.17.1
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]135