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gerrit.openbmc.org / openbmc / libcper / cc36701137e8ad0e7a537c624cd486fb72fb66de / . / specification / json / sections / cper-pcie.json
blob: c9970ef2e8177a418853ad715c0db3d2500a6ddc [file] [log] [blame]
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]1{
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]2 "$schema": "https://json-schema.org/draft/2020-12/schema",
3 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]4 "description": "PCI Express Error Section",
John Chung044afd02024-05-03 19:58:02 +0800[diff] [blame]5 "required": [
6 "validationBits",
7 "portType",
8 "version",
9 "commandStatus",
10 "deviceID",
11 "deviceSerialNumber",
12 "bridgeControlStatus",
13 "capabilityStructure",
14 "aerInfo"
15 ],
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]16 "additionalProperties": false,
17 "properties": {
18 "validationBits": {
19 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]20 "description": "Indicates validity of other fields in this section.",
John Chung044afd02024-05-03 19:58:02 +0800[diff] [blame]21 "required": [
22 "portTypeValid",
23 "versionValid",
24 "commandStatusValid",
25 "deviceIDValid",
26 "deviceSerialNumberValid",
27 "bridgeControlStatusValid",
28 "capabilityStructureStatusValid",
29 "aerInfoValid"
30 ],
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]31 "properties": {
32 "portTypeValid": {
33 "type": "boolean"
34 },
35 "versionValid": {
36 "type": "boolean"
37 },
38 "commandStatusValid": {
39 "type": "boolean"
40 },
41 "deviceIDValid": {
42 "type": "boolean"
43 },
44 "deviceSerialNumberValid": {
45 "type": "boolean"
46 },
47 "bridgeControlStatusValid": {
48 "type": "boolean"
49 },
50 "capabilityStructureStatusValid": {
51 "type": "boolean"
52 },
53 "aerInfoValid": {
54 "type": "boolean"
55 }
56 }
57 },
58 "portType": {
59 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]60 "description": "PCIe Device/Port Type as defined in the PCI Express capabilities register.",
Lawrence Tang8a2d7372022-07-12 16:44:49 +0100[diff] [blame]61 "$ref": "./common/cper-json-nvp.json"
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]62 },
63 "version": {
64 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]65 "description": "PCIe Spec. version supported by the platform",
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]66 "required": ["major", "minor"],
67 "properties": {
68 "major": {
69 "type": "integer"
70 },
71 "minor": {
72 "type": "integer"
73 }
74 }
75 },
76 "commandStatus": {
77 "type": "object",
78 "required": ["commandRegister", "statusRegister"],
79 "properties": {
80 "commandRegister": {
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]81 "type": "integer",
82 "description": "PCI Command Register"
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]83 },
84 "statusRegister": {
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]85 "type": "integer",
86 "description": "PCI Status Register"
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]87 }
88 }
89 },
90 "deviceID": {
91 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]92 "description": "PCIe Root Port PCI/bridge PCI compatible device number and bus number information to uniquely identify the root port or bridge.",
John Chung044afd02024-05-03 19:58:02 +0800[diff] [blame]93 "required": [
94 "vendorID",
95 "deviceID",
Aushim Nagarkatticc367012024-12-05 18:17:27 -0800[diff] [blame^]96 "deviceIDHex",
John Chung044afd02024-05-03 19:58:02 +0800[diff] [blame]97 "classCode",
98 "functionNumber",
99 "deviceNumber",
100 "segmentNumber",
101 "primaryOrDeviceBusNumber",
102 "secondaryBusNumber",
103 "slotNumber"
104 ],
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]105 "properties": {
106 "vendorID": {
107 "type": "integer"
108 },
109 "deviceID": {
110 "type": "integer"
111 },
Aushim Nagarkatticc367012024-12-05 18:17:27 -0800[diff] [blame^]112 "deviceIDHex": {
113 "type": "string"
114 },
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]115 "classCode": {
116 "type": "integer"
117 },
118 "functionNumber": {
119 "type": "integer"
120 },
121 "deviceNumber": {
122 "type": "integer"
123 },
124 "segmentNumber": {
125 "type": "integer"
126 },
127 "primaryOrDeviceBusNumber": {
128 "type": "integer"
129 },
130 "secondaryBusNumber": {
131 "type": "integer"
132 },
133 "slotNumber": {
134 "type": "integer"
135 }
136 }
137 },
138 "deviceSerialNumber": {
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]139 "type": "integer",
140 "description": "PCIe Device Serial Number"
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]141 },
142 "bridgeControlStatus": {
143 "type": "object",
144 "required": ["secondaryStatusRegister", "controlRegister"],
145 "properties": {
146 "secondaryStatusRegister": {
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]147 "type": "integer",
148 "description": "Bridge Secondary Status Register"
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]149 },
150 "controlRegister": {
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]151 "type": "integer",
152 "description": "Bridge Control Register"
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]153 }
154 }
155 },
156 "capabilityStructure": {
157 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]158 "description": "This feild reports either the PCIe 2.0 Capability structure",
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]159 "required": ["data"],
160 "properties": {
161 "data": {
162 "type": "string"
163 }
164 }
165 },
166 "aerInfo": {
167 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -0800[diff] [blame]168 "description": "PCIe Advanced Error Reporting Extended Capability Structure.",
Lawrence Tang3ab351f2022-07-20 16:09:34 +0100[diff] [blame]169 "required": ["data"],
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]170 "properties": {
Lawrence Tang3ab351f2022-07-20 16:09:34 +0100[diff] [blame]171 "data": {
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]172 "type": "string"
Andrew Adriance3cebfc22024-11-20 12:57:04 -0800[diff] [blame]173 },
174 "capability_header": {
175 "type": "integer"
176 },
177 "uncorrectable_error_status": {
178 "type": "integer"
179 },
Aushim Nagarkatticc367012024-12-05 18:17:27 -0800[diff] [blame^]180 "uncorrectable_error_status_hex": {
181 "type": "string"
182 },
Andrew Adriance3cebfc22024-11-20 12:57:04 -0800[diff] [blame]183 "uncorrectable_error_mask": {
184 "type": "integer"
185 },
186 "uncorrectable_error_severity": {
187 "type": "integer"
188 },
189 "correctable_error_status": {
190 "type": "integer"
191 },
Aushim Nagarkatticc367012024-12-05 18:17:27 -0800[diff] [blame^]192 "correctable_error_status_hex": {
193 "type": "string"
194 },
Andrew Adriance3cebfc22024-11-20 12:57:04 -0800[diff] [blame]195 "correctable_error_mask": {
196 "type": "integer"
197 },
198 "capabilites_control": {
199 "type": "integer"
200 },
201 "tlp_header_0": {
202 "type": "integer"
203 },
204 "tlp_header_1": {
205 "type": "integer"
206 },
207 "tlp_header_2": {
208 "type": "integer"
209 },
210 "tlp_header_3": {
211 "type": "integer"
Lawrence Tang079d5812022-07-12 14:15:32 +0100[diff] [blame]212 }
213 }
214 }
215 }
John Chung044afd02024-05-03 19:58:02 +0800[diff] [blame]216}