Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 2 | <attn_node model_ec="P10_10,P10_20" name="TP_LOCAL_FIR" reg_type="SCOM"> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 3 | <local_fir config="W2" name="TP_LOCAL_FIR"> |
| 4 | <instance addr="0x01040100" reg_inst="0"/> |
| 5 | <action attn_type="CS" config="000"/> |
| 6 | <action attn_type="RE" config="010"/> |
| 7 | <action attn_type="SPA" config="100"/> |
| 8 | <action attn_type="UCS" config="110"/> |
| 9 | <action attn_type="HA" config="001"/> |
| 10 | </local_fir> |
Zane Shelley | c905d2b | 2021-07-28 17:38:56 -0500 | [diff] [blame] | 11 | |
| 12 | <register name="ROOT_CTRL0"> |
| 13 | <instance reg_inst="0" addr="0x00050010" /> |
| 14 | </register> |
| 15 | |
| 16 | <register name="ROOT_CTRL3"> |
| 17 | <instance reg_inst="0" addr="0x00050013" /> |
| 18 | </register> |
| 19 | |
| 20 | <register name="ROOT_CTRL4"> |
| 21 | <instance reg_inst="0" addr="0x00050014" /> |
| 22 | </register> |
| 23 | |
| 24 | <register name="ROOT_CTRL5"> |
| 25 | <instance reg_inst="0" addr="0x00050015" /> |
| 26 | </register> |
| 27 | |
| 28 | <register name="ROOT_CTRL6"> |
| 29 | <instance reg_inst="0" addr="0x00050016" /> |
| 30 | </register> |
| 31 | |
| 32 | <register name="RCS_SENSE_1"> |
| 33 | <instance reg_inst="0" addr="0x0005001D" /> |
| 34 | </register> |
| 35 | |
| 36 | <register name="RCS_SENSE_2"> |
| 37 | <instance reg_inst="0" addr="0x0005001E" /> |
| 38 | </register> |
| 39 | |
| 40 | <register name="BC_OR_PCBSLV_ERROR"> |
| 41 | <instance reg_inst="0" addr="0x470F001F" /> |
| 42 | </register> |
| 43 | |
| 44 | <register name="PCBSLV_CONFIG"> |
| 45 | <!-- One per chiplet --> |
| 46 | <instance reg_inst= "1" addr="0x010F001E" /> |
| 47 | <instance reg_inst= "2" addr="0x020F001E" /> |
| 48 | <instance reg_inst= "3" addr="0x030F001E" /> |
| 49 | <instance reg_inst= "8" addr="0x080F001E" /> |
| 50 | <instance reg_inst= "9" addr="0x090F001E" /> |
| 51 | <instance reg_inst="12" addr="0x0C0F001E" /> |
| 52 | <instance reg_inst="13" addr="0x0D0F001E" /> |
| 53 | <instance reg_inst="14" addr="0x0E0F001E" /> |
| 54 | <instance reg_inst="15" addr="0x0F0F001E" /> |
| 55 | <instance reg_inst="16" addr="0x100F001E" /> |
| 56 | <instance reg_inst="17" addr="0x110F001E" /> |
| 57 | <instance reg_inst="18" addr="0x120F001E" /> |
| 58 | <instance reg_inst="19" addr="0x130F001E" /> |
| 59 | <instance reg_inst="24" addr="0x180F001E" /> |
| 60 | <instance reg_inst="25" addr="0x190F001E" /> |
| 61 | <instance reg_inst="26" addr="0x1A0F001E" /> |
| 62 | <instance reg_inst="27" addr="0x1B0F001E" /> |
| 63 | <instance reg_inst="28" addr="0x1C0F001E" /> |
| 64 | <instance reg_inst="29" addr="0x1D0F001E" /> |
| 65 | <instance reg_inst="30" addr="0x1E0F001E" /> |
| 66 | <instance reg_inst="31" addr="0x1F0F001E" /> |
| 67 | <instance reg_inst="32" addr="0x200F001E" /> |
| 68 | <instance reg_inst="33" addr="0x210F001E" /> |
| 69 | <instance reg_inst="34" addr="0x220F001E" /> |
| 70 | <instance reg_inst="35" addr="0x230F001E" /> |
| 71 | <instance reg_inst="36" addr="0x240F001E" /> |
| 72 | <instance reg_inst="37" addr="0x250F001E" /> |
| 73 | <instance reg_inst="38" addr="0x260F001E" /> |
| 74 | <instance reg_inst="39" addr="0x270F001E" /> |
| 75 | </register> |
| 76 | |
| 77 | <register name="PCBSLV_ERROR"> |
| 78 | <!-- One per chiplet --> |
| 79 | <instance reg_inst= "1" addr="0x010F001F" /> |
| 80 | <instance reg_inst= "2" addr="0x020F001F" /> |
| 81 | <instance reg_inst= "3" addr="0x030F001F" /> |
| 82 | <instance reg_inst= "8" addr="0x080F001F" /> |
| 83 | <instance reg_inst= "9" addr="0x090F001F" /> |
| 84 | <instance reg_inst="12" addr="0x0C0F001F" /> |
| 85 | <instance reg_inst="13" addr="0x0D0F001F" /> |
| 86 | <instance reg_inst="14" addr="0x0E0F001F" /> |
| 87 | <instance reg_inst="15" addr="0x0F0F001F" /> |
| 88 | <instance reg_inst="16" addr="0x100F001F" /> |
| 89 | <instance reg_inst="17" addr="0x110F001F" /> |
| 90 | <instance reg_inst="18" addr="0x120F001F" /> |
| 91 | <instance reg_inst="19" addr="0x130F001F" /> |
| 92 | <instance reg_inst="24" addr="0x180F001F" /> |
| 93 | <instance reg_inst="25" addr="0x190F001F" /> |
| 94 | <instance reg_inst="26" addr="0x1A0F001F" /> |
| 95 | <instance reg_inst="27" addr="0x1B0F001F" /> |
| 96 | <instance reg_inst="28" addr="0x1C0F001F" /> |
| 97 | <instance reg_inst="29" addr="0x1D0F001F" /> |
| 98 | <instance reg_inst="30" addr="0x1E0F001F" /> |
| 99 | <instance reg_inst="31" addr="0x1F0F001F" /> |
| 100 | <instance reg_inst="32" addr="0x200F001F" /> |
| 101 | <instance reg_inst="33" addr="0x210F001F" /> |
| 102 | <instance reg_inst="34" addr="0x220F001F" /> |
| 103 | <instance reg_inst="35" addr="0x230F001F" /> |
| 104 | <instance reg_inst="36" addr="0x240F001F" /> |
| 105 | <instance reg_inst="37" addr="0x250F001F" /> |
| 106 | <instance reg_inst="38" addr="0x260F001F" /> |
| 107 | <instance reg_inst="39" addr="0x270F001F" /> |
| 108 | </register> |
| 109 | |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 110 | <bit pos="0">CFIR - Parity or PCB access error</bit> |
| 111 | <bit pos="1">CPLT_CTRL - PCB access error</bit> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 112 | <bit pos="2">CC - PCB access error</bit> |
| 113 | <bit pos="3">CC - Clock Control Error</bit> |
| 114 | <bit pos="4">PSC - PSCOM access error</bit> |
| 115 | <bit pos="5">PSC - internal or ring interface error</bit> |
Zane Shelley | c905d2b | 2021-07-28 17:38:56 -0500 | [diff] [blame] | 116 | <bit pos="6">THERM - internal error</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 117 | <bit pos="7">THERM - pcb error</bit> |
| 118 | <bit pos="8">THERMTRIP - Critical temperature indicator</bit> |
| 119 | <bit pos="9">THERMTRIP - Fatal temperature indicator</bit> |
| 120 | <bit pos="10">VOLTTRIP - Voltage sense error</bit> |
| 121 | <bit pos="11">DBG - scom parity fail</bit> |
| 122 | <bit pos="12">reserved</bit> |
| 123 | <bit pos="13">reserved</bit> |
| 124 | <bit pos="14">reserved</bit> |
| 125 | <bit pos="15">reserved</bit> |
| 126 | <bit pos="16">reserved</bit> |
| 127 | <bit pos="17">reserved</bit> |
| 128 | <bit pos="18">reserved</bit> |
| 129 | <bit pos="19">reserved</bit> |
| 130 | <bit pos="20">Trace00 - scom parity err</bit> |
| 131 | <bit pos="21">ITR - FMU error</bit> |
| 132 | <bit pos="22">ITR - PCB error</bit> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 133 | <bit pos="23">PCB Master - timeout</bit> |
| 134 | <bit pos="24">I2CM - Parity errors</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 135 | <bit pos="25">TOD - any error</bit> |
| 136 | <bit pos="26">TOD - access error PIB</bit> |
Zane Shelley | c905d2b | 2021-07-28 17:38:56 -0500 | [diff] [blame] | 137 | <bit pos="27">TOD - Error reported from PHYP</bit> |
| 138 | <bit pos="28" child_node="PLL_UNLOCK">PCB slave error</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 139 | <bit pos="29">SBE - PPE int hardware error</bit> |
| 140 | <bit pos="30">SBE - PPE ext hardware error</bit> |
Zane Shelley | c905d2b | 2021-07-28 17:38:56 -0500 | [diff] [blame] | 141 | <bit pos="31">SBE - PPE code error</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 142 | <bit pos="32">SBE - PPE debug code breakpoint</bit> |
| 143 | <bit pos="33">SBE - PPE in halted state</bit> |
| 144 | <bit pos="34">SBE - PPE watchdog timeout</bit> |
Zane Shelley | c905d2b | 2021-07-28 17:38:56 -0500 | [diff] [blame] | 145 | <bit pos="35">SBE - unused</bit> |
| 146 | <bit pos="36">SBE - unused</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 147 | <bit pos="37">SBE - PPE triggers DBG</bit> |
Zane Shelley | c905d2b | 2021-07-28 17:38:56 -0500 | [diff] [blame] | 148 | <bit pos="38">OTP - SCOM access errors and single ecc correctable</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 149 | <bit pos="39">TPIO External Trigger</bit> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 150 | <bit pos="40">PCB Master - Multicast group member count underrun (MC misconfig)</bit> |
| 151 | <bit pos="41">PCB Master - Parity ERR</bit> |
Zane Shelley | c905d2b | 2021-07-28 17:38:56 -0500 | [diff] [blame] | 152 | <bit pos="42" child_node="RCS_OSC_ERROR">RCS OSC error on clk A</bit> |
| 153 | <bit pos="43" child_node="RCS_OSC_ERROR">RCS OSC error on clk B</bit> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 154 | <bit pos="44">RCS - Up/down counter A unlock</bit> |
| 155 | <bit pos="45">RCS - Up/down counter B unlock</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 156 | <bit pos="46">PIBMEM</bit> |
| 157 | <bit pos="47">PIBMEM</bit> |
Zane Shelley | f8a726b | 2020-12-16 21:29:32 -0600 | [diff] [blame] | 158 | <bit pos="48">OTP - ECC UE or CE count overflow</bit> |
| 159 | <bit pos="49">Nest DPLL: DCO empty</bit> |
| 160 | <bit pos="50">Nest DPLL: DCO full</bit> |
| 161 | <bit pos="51">Nest DPLL: internal error</bit> |
| 162 | <bit pos="52">PAU DPLL: DCO empty</bit> |
| 163 | <bit pos="53">PAU DPLL: DCO full</bit> |
| 164 | <bit pos="54">PAU DPLL: internal error</bit> |
Zane Shelley | abc51c2 | 2020-11-09 21:35:35 -0600 | [diff] [blame] | 165 | <bit pos="55">SPI Master 0 Err</bit> |
| 166 | <bit pos="56">SPI Master 1 Err</bit> |
| 167 | <bit pos="57">SPI Master 2 Err</bit> |
| 168 | <bit pos="58">SPI Master 3 Err</bit> |
| 169 | <bit pos="59">SPI Master 4 Err</bit> |
| 170 | <bit pos="60">unused</bit> |
| 171 | <bit pos="61">unused</bit> |
| 172 | <bit pos="62">unused</bit> |
| 173 | <bit pos="63">ext_local_xstop</bit> |
| 174 | </attn_node> |