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Zane Shelleyfd3f9cc2019-07-29 15:02:24 -05001// Module Description **************************************************
2//
3// Description: This module provides the implementation for the PRD Scan
4// Comm Register Chip class.
5//
6// End Module Description **********************************************
7
8//----------------------------------------------------------------------
9// Includes
10//----------------------------------------------------------------------
11
Zane Shelley52cb1a92019-08-21 14:38:31 -050012#include <hei_includes.hpp>
Zane Shelley61565dc2019-09-18 21:57:10 -050013#include <hei_user_interface.hpp>
Zane Shelley52cb1a92019-08-21 14:38:31 -050014#include <register/hei_hardware_register.hpp>
15#include <util/hei_bit_string.hpp>
16
Zane Shelleyb77b5732019-08-30 22:01:06 -050017#if 0
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050018#include <iipchip.h>
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050019#include <prdfMain.H>
20#include <prdfRasServices.H>
21#include <prdfRegisterCache.H>
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050022#include <prdfPlatServices.H>
23#include <prdfExtensibleChip.H>
24
25//----------------------------------------------------------------------
26// User Types
27//----------------------------------------------------------------------
28
29//----------------------------------------------------------------------
30// Constants
31//----------------------------------------------------------------------
32
33//----------------------------------------------------------------------
34// Macros
35//----------------------------------------------------------------------
36
37//----------------------------------------------------------------------
38// Internal Function Prototypes
39//----------------------------------------------------------------------
40
41//----------------------------------------------------------------------
42// Global Variables
43//----------------------------------------------------------------------
44
45//---------------------------------------------------------------------
46// Member Function Specifications
47//---------------------------------------------------------------------
48
49// --------------------------------------------------------------------
Zane Shelleyb77b5732019-08-30 22:01:06 -050050#endif
51
Zane Shelley871adec2019-07-30 11:01:39 -050052namespace libhei
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050053{
54
Zane Shelleyb77b5732019-08-30 22:01:06 -050055#if 0
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050056// ---------------------------------------------------------------------
57
Zane Shelleycd36f432019-08-30 21:22:07 -050058void HardwareRegister::SetBitString( const BitString *bs )
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050059{
60 BitString & l_string = AccessBitString();
61 l_string.setString(*bs);
62}
63
64
65//------------------------------------------------------------------------------
66
Zane Shelleycd36f432019-08-30 21:22:07 -050067const BitString * HardwareRegister::GetBitString(ATTENTION_TYPE i_type) const
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050068{
69 // Calling Read() will ensure that an entry exists in the cache and the
70 // entry has at been synched with hardware at least once. Note that we
71 // cannot read hardware for write-only registers. In this case, an entry
72 // will be created in the cache, if it does not exist, when readCache() is
73 // called below.
74 if ( ( ACCESS_NONE != iv_operationType ) &&
75 ( ACCESS_WO != iv_operationType ) )
76 {
77 Read();
78 }
79 return &(readCache());
80}
81
82//------------------------------------------------------------------------------
83
Zane Shelleycd36f432019-08-30 21:22:07 -050084BitString & HardwareRegister::AccessBitString()
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -050085{
86 // Calling Read() will ensure that an entry exists in the cache and the
87 // entry has at been synched with hardware at least once. Note that we
88 // cannot read hardware for write-only registers. In this case, an entry
89 // will be created in the cache, if it does not exist, when readCache() is
90 // called below.
91 if ( ( ACCESS_NONE != iv_operationType ) &&
92 ( ACCESS_WO != iv_operationType ) )
93 {
94 Read();
95 }
96
97 return readCache();
98}
Zane Shelley61565dc2019-09-18 21:57:10 -050099#endif
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500100
101//------------------------------------------------------------------------------
102
Zane Shelley61565dc2019-09-18 21:57:10 -0500103ReturnCode HardwareRegister::read( bool i_force ) const
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500104{
Zane Shelley61565dc2019-09-18 21:57:10 -0500105 ReturnCode rc;
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500106
Zane Shelley61565dc2019-09-18 21:57:10 -0500107#if 0
108 // Read from hardware only if the read is forced or the entry for this
109 // instance does not exist in the cache.
110 if ( i_force || !queryCache() )
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500111 {
Zane Shelley61565dc2019-09-18 21:57:10 -0500112 // This register must be readable.
113 HEI_ASSERT( ( ACCESS_NONE != iv_operationType ) &&
114 ( ACCESS_WO != iv_operationType ) );
115
116 // Get the buffer from the register cache.
117 BitString & bs = readCache();
118
119 // Get the byte size of the buffer.
120 size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() );
121
122 // Read this register from hardware.
123 rc = registerRead( getAccessorChip().getChip(), bs.getBufAddr(),
124 sz_buffer, getRegisterType(), getAddress() );
125 if ( RC_SUCCESS != rc )
126 {
127 // The read failed and we can't trust what was put in the register
128 // cache. So remove this instance's entry from the cache.
129 flushCache( getAccessorChip() );
130 }
131 else
132 {
133 // Sanity check. The returned size of the data written to the buffer
134 // should match the register size.
135 HEI_ASSERT( getSize() == sz_buffer );
136 }
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500137 }
Zane Shelley61565dc2019-09-18 21:57:10 -0500138#endif
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500139
Zane Shelley61565dc2019-09-18 21:57:10 -0500140 return rc;
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500141}
142
143//------------------------------------------------------------------------------
144
Zane Shelley61565dc2019-09-18 21:57:10 -0500145#ifndef __HEI_READ_ONLY
146
147ReturnCode HardwareRegister::write() const
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500148{
Zane Shelley61565dc2019-09-18 21:57:10 -0500149 ReturnCode rc;
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500150
Zane Shelley61565dc2019-09-18 21:57:10 -0500151#if 0
152 // This register must be writable.
153 HEI_ASSERT( ( ACCESS_NONE != iv_operationType ) &&
154 ( ACCESS_RO != iv_operationType ) );
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500155
Zane Shelley61565dc2019-09-18 21:57:10 -0500156 // An entry for this register must exist in the cache.
157 HEI_ASSERT( queryCache() );
158
159 // Get the buffer from the register cache.
160 BitString & bs = readCache();
161
162 // Get the byte size of the buffer.
163 size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() );
164
165 // Write to this register to hardware.
166 rc = registerWrite( getAccessorChip().getChip(), bs.getBufAddr(),
167 sz_buffer, getRegisterType(), getAddress() );
168
169 if ( RC_SUCCESS == rc )
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500170 {
Zane Shelley61565dc2019-09-18 21:57:10 -0500171 // Sanity check. The returned size of the data written to the buffer
172 // should match the register size.
173 HEI_ASSERT( getSize() == sz_buffer );
174 }
175#endif
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500176
Zane Shelley61565dc2019-09-18 21:57:10 -0500177 return rc;
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500178}
179
Zane Shelley61565dc2019-09-18 21:57:10 -0500180#endif // __HEI_READ_ONLY
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500181
Zane Shelley61565dc2019-09-18 21:57:10 -0500182#if 0
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500183//------------------------------------------------------------------------------
184
Zane Shelleycd36f432019-08-30 21:22:07 -0500185bool HardwareRegister::queryCache() const
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500186{
187 RegDataCache & cache = RegDataCache::getCachedRegisters();
Zane Shelley61565dc2019-09-18 21:57:10 -0500188 BitString * bs = cache.queryCache( getAccessorChip(), this );
Zane Shelley05bac982019-09-02 20:57:42 -0500189 return ( nullptr != bs );
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500190}
191
192//------------------------------------------------------------------------------
193
Zane Shelleycd36f432019-08-30 21:22:07 -0500194BitString & HardwareRegister::readCache() const
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500195{
196 RegDataCache & cache = RegDataCache::getCachedRegisters();
Zane Shelley61565dc2019-09-18 21:57:10 -0500197 return cache.read( getAccessorChip(), this );
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500198}
199
200//------------------------------------------------------------------------------
201
Zane Shelleycd36f432019-08-30 21:22:07 -0500202void HardwareRegister::flushCache( ExtensibleChip *i_pChip ) const
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500203{
204 RegDataCache & regDump = RegDataCache::getCachedRegisters();
Zane Shelley05bac982019-09-02 20:57:42 -0500205 if( nullptr == i_pChip )
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500206 {
207 regDump.flush();
208 }
209 else
210 {
211 regDump.flush( i_pChip ,this );
212 }
213}
214
215//-----------------------------------------------------------------------------
216
Zane Shelleycd36f432019-08-30 21:22:07 -0500217bool HardwareRegister::operator == ( const HardwareRegister & i_rightRegister ) const
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500218{
219 if( iv_scomAddress == i_rightRegister.GetAddress() )
220 {
221 return ( iv_chipType == i_rightRegister.getChipType() );
222 }
223 else
224 {
225 return false ;
226 }
227
228}
229
230//-----------------------------------------------------------------------------
Zane Shelleycd36f432019-08-30 21:22:07 -0500231bool HardwareRegister::operator < ( const HardwareRegister & i_rightRegister ) const
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500232{
233 if( iv_scomAddress == i_rightRegister.GetAddress() )
234 {
235 return ( iv_chipType < i_rightRegister.getChipType() );
236 }
237 else
238 {
239 return( iv_scomAddress < i_rightRegister.GetAddress() );
240 }
241
242
243}
244//-----------------------------------------------------------------------------
Zane Shelleycd36f432019-08-30 21:22:07 -0500245bool HardwareRegister::operator >= ( const HardwareRegister & i_rightRegister ) const
Zane Shelleyfd3f9cc2019-07-29 15:02:24 -0500246{
247 return !( *this < i_rightRegister );
248}
Zane Shelleyb77b5732019-08-30 22:01:06 -0500249#endif
Zane Shelley871adec2019-07-30 11:01:39 -0500250
Zane Shelley61565dc2019-09-18 21:57:10 -0500251//------------------------------------------------------------------------------
252
253HardwareRegister::Accessor * HardwareRegister::cv_accessor = nullptr;
254
255//------------------------------------------------------------------------------
256
Zane Shelley871adec2019-07-30 11:01:39 -0500257} // end namespace libhei
258