Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 1 | // Module Description ************************************************** |
| 2 | // |
| 3 | // Description: This module provides the implementation for the PRD Scan |
| 4 | // Comm Register Chip class. |
| 5 | // |
| 6 | // End Module Description ********************************************** |
| 7 | |
| 8 | //---------------------------------------------------------------------- |
| 9 | // Includes |
| 10 | //---------------------------------------------------------------------- |
| 11 | |
Zane Shelley | 52cb1a9 | 2019-08-21 14:38:31 -0500 | [diff] [blame] | 12 | #include <hei_includes.hpp> |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 13 | #include <hei_user_interface.hpp> |
Zane Shelley | 52cb1a9 | 2019-08-21 14:38:31 -0500 | [diff] [blame] | 14 | #include <register/hei_hardware_register.hpp> |
| 15 | #include <util/hei_bit_string.hpp> |
| 16 | |
Zane Shelley | b77b573 | 2019-08-30 22:01:06 -0500 | [diff] [blame] | 17 | #if 0 |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 18 | #include <iipchip.h> |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 19 | #include <prdfMain.H> |
| 20 | #include <prdfRasServices.H> |
| 21 | #include <prdfRegisterCache.H> |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 22 | #include <prdfPlatServices.H> |
| 23 | #include <prdfExtensibleChip.H> |
| 24 | |
| 25 | //---------------------------------------------------------------------- |
| 26 | // User Types |
| 27 | //---------------------------------------------------------------------- |
| 28 | |
| 29 | //---------------------------------------------------------------------- |
| 30 | // Constants |
| 31 | //---------------------------------------------------------------------- |
| 32 | |
| 33 | //---------------------------------------------------------------------- |
| 34 | // Macros |
| 35 | //---------------------------------------------------------------------- |
| 36 | |
| 37 | //---------------------------------------------------------------------- |
| 38 | // Internal Function Prototypes |
| 39 | //---------------------------------------------------------------------- |
| 40 | |
| 41 | //---------------------------------------------------------------------- |
| 42 | // Global Variables |
| 43 | //---------------------------------------------------------------------- |
| 44 | |
| 45 | //--------------------------------------------------------------------- |
| 46 | // Member Function Specifications |
| 47 | //--------------------------------------------------------------------- |
| 48 | |
| 49 | // -------------------------------------------------------------------- |
Zane Shelley | b77b573 | 2019-08-30 22:01:06 -0500 | [diff] [blame] | 50 | #endif |
| 51 | |
Zane Shelley | 871adec | 2019-07-30 11:01:39 -0500 | [diff] [blame] | 52 | namespace libhei |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 53 | { |
| 54 | |
Zane Shelley | b77b573 | 2019-08-30 22:01:06 -0500 | [diff] [blame] | 55 | #if 0 |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 56 | // --------------------------------------------------------------------- |
| 57 | |
Zane Shelley | cd36f43 | 2019-08-30 21:22:07 -0500 | [diff] [blame] | 58 | void HardwareRegister::SetBitString( const BitString *bs ) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 59 | { |
| 60 | BitString & l_string = AccessBitString(); |
| 61 | l_string.setString(*bs); |
| 62 | } |
| 63 | |
| 64 | |
| 65 | //------------------------------------------------------------------------------ |
| 66 | |
Zane Shelley | cd36f43 | 2019-08-30 21:22:07 -0500 | [diff] [blame] | 67 | const BitString * HardwareRegister::GetBitString(ATTENTION_TYPE i_type) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 68 | { |
| 69 | // Calling Read() will ensure that an entry exists in the cache and the |
| 70 | // entry has at been synched with hardware at least once. Note that we |
| 71 | // cannot read hardware for write-only registers. In this case, an entry |
| 72 | // will be created in the cache, if it does not exist, when readCache() is |
| 73 | // called below. |
| 74 | if ( ( ACCESS_NONE != iv_operationType ) && |
| 75 | ( ACCESS_WO != iv_operationType ) ) |
| 76 | { |
| 77 | Read(); |
| 78 | } |
| 79 | return &(readCache()); |
| 80 | } |
| 81 | |
| 82 | //------------------------------------------------------------------------------ |
| 83 | |
Zane Shelley | cd36f43 | 2019-08-30 21:22:07 -0500 | [diff] [blame] | 84 | BitString & HardwareRegister::AccessBitString() |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 85 | { |
| 86 | // Calling Read() will ensure that an entry exists in the cache and the |
| 87 | // entry has at been synched with hardware at least once. Note that we |
| 88 | // cannot read hardware for write-only registers. In this case, an entry |
| 89 | // will be created in the cache, if it does not exist, when readCache() is |
| 90 | // called below. |
| 91 | if ( ( ACCESS_NONE != iv_operationType ) && |
| 92 | ( ACCESS_WO != iv_operationType ) ) |
| 93 | { |
| 94 | Read(); |
| 95 | } |
| 96 | |
| 97 | return readCache(); |
| 98 | } |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 99 | #endif |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 100 | |
| 101 | //------------------------------------------------------------------------------ |
| 102 | |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 103 | ReturnCode HardwareRegister::read( bool i_force ) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 104 | { |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 105 | ReturnCode rc; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 106 | |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 107 | #if 0 |
| 108 | // Read from hardware only if the read is forced or the entry for this |
| 109 | // instance does not exist in the cache. |
| 110 | if ( i_force || !queryCache() ) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 111 | { |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 112 | // This register must be readable. |
| 113 | HEI_ASSERT( ( ACCESS_NONE != iv_operationType ) && |
| 114 | ( ACCESS_WO != iv_operationType ) ); |
| 115 | |
| 116 | // Get the buffer from the register cache. |
| 117 | BitString & bs = readCache(); |
| 118 | |
| 119 | // Get the byte size of the buffer. |
| 120 | size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() ); |
| 121 | |
| 122 | // Read this register from hardware. |
| 123 | rc = registerRead( getAccessorChip().getChip(), bs.getBufAddr(), |
| 124 | sz_buffer, getRegisterType(), getAddress() ); |
| 125 | if ( RC_SUCCESS != rc ) |
| 126 | { |
| 127 | // The read failed and we can't trust what was put in the register |
| 128 | // cache. So remove this instance's entry from the cache. |
| 129 | flushCache( getAccessorChip() ); |
| 130 | } |
| 131 | else |
| 132 | { |
| 133 | // Sanity check. The returned size of the data written to the buffer |
| 134 | // should match the register size. |
| 135 | HEI_ASSERT( getSize() == sz_buffer ); |
| 136 | } |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 137 | } |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 138 | #endif |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 139 | |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 140 | return rc; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 141 | } |
| 142 | |
| 143 | //------------------------------------------------------------------------------ |
| 144 | |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 145 | #ifndef __HEI_READ_ONLY |
| 146 | |
| 147 | ReturnCode HardwareRegister::write() const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 148 | { |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 149 | ReturnCode rc; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 150 | |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 151 | #if 0 |
| 152 | // This register must be writable. |
| 153 | HEI_ASSERT( ( ACCESS_NONE != iv_operationType ) && |
| 154 | ( ACCESS_RO != iv_operationType ) ); |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 155 | |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 156 | // An entry for this register must exist in the cache. |
| 157 | HEI_ASSERT( queryCache() ); |
| 158 | |
| 159 | // Get the buffer from the register cache. |
| 160 | BitString & bs = readCache(); |
| 161 | |
| 162 | // Get the byte size of the buffer. |
| 163 | size_t sz_buffer = BitString::getMinBytes( bs.getBitLen() ); |
| 164 | |
| 165 | // Write to this register to hardware. |
| 166 | rc = registerWrite( getAccessorChip().getChip(), bs.getBufAddr(), |
| 167 | sz_buffer, getRegisterType(), getAddress() ); |
| 168 | |
| 169 | if ( RC_SUCCESS == rc ) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 170 | { |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 171 | // Sanity check. The returned size of the data written to the buffer |
| 172 | // should match the register size. |
| 173 | HEI_ASSERT( getSize() == sz_buffer ); |
| 174 | } |
| 175 | #endif |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 176 | |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 177 | return rc; |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 178 | } |
| 179 | |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 180 | #endif // __HEI_READ_ONLY |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 181 | |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 182 | #if 0 |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 183 | //------------------------------------------------------------------------------ |
| 184 | |
Zane Shelley | cd36f43 | 2019-08-30 21:22:07 -0500 | [diff] [blame] | 185 | bool HardwareRegister::queryCache() const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 186 | { |
| 187 | RegDataCache & cache = RegDataCache::getCachedRegisters(); |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 188 | BitString * bs = cache.queryCache( getAccessorChip(), this ); |
Zane Shelley | 05bac98 | 2019-09-02 20:57:42 -0500 | [diff] [blame] | 189 | return ( nullptr != bs ); |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 190 | } |
| 191 | |
| 192 | //------------------------------------------------------------------------------ |
| 193 | |
Zane Shelley | cd36f43 | 2019-08-30 21:22:07 -0500 | [diff] [blame] | 194 | BitString & HardwareRegister::readCache() const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 195 | { |
| 196 | RegDataCache & cache = RegDataCache::getCachedRegisters(); |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 197 | return cache.read( getAccessorChip(), this ); |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 198 | } |
| 199 | |
| 200 | //------------------------------------------------------------------------------ |
| 201 | |
Zane Shelley | cd36f43 | 2019-08-30 21:22:07 -0500 | [diff] [blame] | 202 | void HardwareRegister::flushCache( ExtensibleChip *i_pChip ) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 203 | { |
| 204 | RegDataCache & regDump = RegDataCache::getCachedRegisters(); |
Zane Shelley | 05bac98 | 2019-09-02 20:57:42 -0500 | [diff] [blame] | 205 | if( nullptr == i_pChip ) |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 206 | { |
| 207 | regDump.flush(); |
| 208 | } |
| 209 | else |
| 210 | { |
| 211 | regDump.flush( i_pChip ,this ); |
| 212 | } |
| 213 | } |
| 214 | |
| 215 | //----------------------------------------------------------------------------- |
| 216 | |
Zane Shelley | cd36f43 | 2019-08-30 21:22:07 -0500 | [diff] [blame] | 217 | bool HardwareRegister::operator == ( const HardwareRegister & i_rightRegister ) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 218 | { |
| 219 | if( iv_scomAddress == i_rightRegister.GetAddress() ) |
| 220 | { |
| 221 | return ( iv_chipType == i_rightRegister.getChipType() ); |
| 222 | } |
| 223 | else |
| 224 | { |
| 225 | return false ; |
| 226 | } |
| 227 | |
| 228 | } |
| 229 | |
| 230 | //----------------------------------------------------------------------------- |
Zane Shelley | cd36f43 | 2019-08-30 21:22:07 -0500 | [diff] [blame] | 231 | bool HardwareRegister::operator < ( const HardwareRegister & i_rightRegister ) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 232 | { |
| 233 | if( iv_scomAddress == i_rightRegister.GetAddress() ) |
| 234 | { |
| 235 | return ( iv_chipType < i_rightRegister.getChipType() ); |
| 236 | } |
| 237 | else |
| 238 | { |
| 239 | return( iv_scomAddress < i_rightRegister.GetAddress() ); |
| 240 | } |
| 241 | |
| 242 | |
| 243 | } |
| 244 | //----------------------------------------------------------------------------- |
Zane Shelley | cd36f43 | 2019-08-30 21:22:07 -0500 | [diff] [blame] | 245 | bool HardwareRegister::operator >= ( const HardwareRegister & i_rightRegister ) const |
Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame] | 246 | { |
| 247 | return !( *this < i_rightRegister ); |
| 248 | } |
Zane Shelley | b77b573 | 2019-08-30 22:01:06 -0500 | [diff] [blame] | 249 | #endif |
Zane Shelley | 871adec | 2019-07-30 11:01:39 -0500 | [diff] [blame] | 250 | |
Zane Shelley | 61565dc | 2019-09-18 21:57:10 -0500 | [diff] [blame^] | 251 | //------------------------------------------------------------------------------ |
| 252 | |
| 253 | HardwareRegister::Accessor * HardwareRegister::cv_accessor = nullptr; |
| 254 | |
| 255 | //------------------------------------------------------------------------------ |
| 256 | |
Zane Shelley | 871adec | 2019-07-30 11:01:39 -0500 | [diff] [blame] | 257 | } // end namespace libhei |
| 258 | |